Browsing by Author "Wang, Teng"
- Results Per Page
- Sort Options
Publication 3D IC assembly using thermal compression bonding and wafer-level underfill – strategies for quality improvement and throughput enhancement
Proceedings paper2016, IEEE 18th Electronic Packaging Technology Conference - EPTC, 30/11/2016, p.791-796Publication 3D IC process development for enabling chip-on-chip and chip on wafer multi-stacking at assembly
Meeting abstract2015, International Conference on Electronic Packaging & iMAPS All Asia Conference - ICEP-IACC, 14/04/2015, p.56-60Publication 3D stacking induced mechanical stress effects
Proceedings paper2014, IEEE 64th Electronic Components and Technology Conference - ECTC, 27/05/2014, p.309-315Publication 3D stacking of Co and Ni based microbumps
; ; ; ; Publication 3D stacking using bump-less process for sub 10μm pitches
Proceedings paper2016, IEEE 66th Electronic Components and Technology Conference - ECTC, 31/05/2016, p.128-133Publication A novel in-situ resistance measurement to extract IMC resistivity and kinetic parameter for CoSn 3D stacks
Proceedings paper2017, IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference - IEEE S3S, 16/10/2017, p.7.4Publication An alternative 3D packaging route thru wafer reconstruction
Proceedings paper2015, 17th Electronic Packaging Technology Conference - EPTC, 2/12/2015, p.1-5Publication Application of 3D X-ray microscopy for 3D IC process development
Proceedings paper2016, International Wafer Level Packaging Conference - IWLPC, 18/10/2016Publication Automated testing of bare die-to-die stacks
Proceedings paper2015-05, IEEE European Test Symposium - ETS, 25/05/2015Publication Automated testing of bare die-to-die stacks
Proceedings paper2015-07, TestVision 2020 Workshop, 15/07/2015, p.1-25Publication Automated testing of bare die-to-die stacks
Proceedings paper2015-10, IEEE International Test Conference - ITC, 6/10/2015, p.1-10Publication Automated testing of singulated die-to-die stacks
Proceedings paper2015-09, COMPASS - Cascade Microtech User Meeting, 8/09/2015Publication Comparative study of 3D stacked IC and 3D interposer integration: processing and assembly challenges
Proceedings paper2014, IEEE 3D Sytem Integration Conference - 3DIC, 1/12/2014, p.1-7Publication Comparison of electrical properties of thermo-compression bonded 3D stacks using a liquid and a dry-film wafer level underfills
; ; ; ; Meeting abstract2015, 17th Electronics Packaging Technology Conference - EPTC, 2/12/2015Publication Cost components for 3D system integration
Proceedings paper2014, Electronics System-Integration Technology Conference - ESTC, 16/09/2014, p.1-5Publication Cu-Cu insertion bonding technique using photosensitive polymer as WLUF
Proceedings paper2014, 16th IEEE Electronic Packaging Technology Conference - EPTC, 3/12/2014, p.313-317Publication Developing underfill process in screening of no-flow underfill and wafer-applied underfill materials for 3D stacking
; ; ; ; Wang, TengProceedings paper2013, 15th Electronics Packaging Technology Conference - EPTC, 11/12/2013, p.124-129Publication Development and evaluation of photodefinable wafer level underfill
Publication Development of multi-stack dielectric wafer bonding
Proceedings paper2016, 17th International Conference on Electronic Packaging Technology - ICEPT, 16/08/2016, p.22-25Publication Development of underfilling and thermo-compression bonding processes for stacking multi-layer 3D ICs
Proceedings paper2014, 5th Electronics System-Integration Technology Conference - ESTC, 16/09/2014, p.1-5
- «
- 1 (current)
- 2
- 3
- »