Browsing by author "Goel, Sandeep Kumar"
Now showing items 1-6 of 6
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Design and Manufacturing Technology of Advanced Multi-Die Packages on the 'Slope of Enlightenment': Where Is 3D-Test?
Marinissen, Erik Jan; Stucchi, Michele; Vardaman, E. Jan; Armstrong, Dave; Chen, Harry; Goel, Sandeep Kumar; Huang, Yu; McLaurin, Teresa (2021) -
DfT architecture for 3D-SICs with multiple towers
Chi, Chun-Chuan; Marinissen, Erik Jan; Goel, Sandeep Kumar; Wu, Cheng-Wen (2011-05) -
DfT architecture for multi-tower 3D-SICs
Chi, Chun-Chuan; Marinissen, Erik Jan; Goel, Sandeep Kumar; Wu, Cheng-Wen (2011) -
Low-cost post-bond testing of 3D-ICs containing a passive silicon interposer base
Chi, Chun-Chuan; Marinissen, Erik Jan; Goel, Sandeep Kumar; Wu, Cheng-Wen (2014-11) -
Post-bond testing of 2.5D-SICs and 3D-SICs containing a passive silicon interposer base
Chi, Chun-Chuan; Marinissen, Erik Jan; Goel, Sandeep Kumar; Wu, Cheng-Wen (2011-09) -
Test-architecture optimization for TSV-based 3D stacked ICs
Noia, Brandon; Goel, Sandeep Kumar; Chakrabarty, Krishnendu; Marinissen, Erik Jan; Verbree, Jouke (2010)