Browsing by author "Santoro, Gaetano"
Now showing items 1-10 of 10
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3D-carrier profiling and parasitic resistance analysis in vertically stacked gate-all-around Si nanowire CMOS transistors
Eyben, Pierre; Ritzenthaler, Romain; De Keersgieter, An; Chiarella, Thomas; Veloso, Anabela; Mertens, Hans; Pena, Vanessa; Santoro, Gaetano; Machillot, Jerome; Kim, Myungsun; Miyashita, Toshihiko; Yoshida, Naomi; Bender, Hugo; Richard, Olivier; Celano, Umberto; Paredis, Kristof; Wouters, Lennaert; Mitard, Jerome; Horiguchi, Naoto (2019) -
Characterizing immersion lithography micro bridge defects using advanced features of teh SEMVision G3 STAR FIB
Van Den Heuvel, Dieter; Santoro, Gaetano; Gronheid, Roel; Braggin, Jennifer; Rosslee, Craig; Leray, Philippe; Cheng, Shaunee; Schreutelkamp, Rob; Hillel, Noam (2009) -
CMP of a RU based layer in an advanced Cu low-k stack
Vaes, Jan; Sinapi, Fabrice; Hernandez, Jose Luis; Santoro, Gaetano; Nguyen, Olivier; Wang, James (2007-10) -
EUV mask defectivity study by existing DUV tools and new EBEAM technology
Mangan, Shmoolik; Jonckheere, Rik; Van Den Heuvel, Dieter; Rozentsvige, Moshe; Kudriashov, Vladislav; Shoval, Lior; Santoro, Gaetano; Englard, Ilan (2010) -
Micro-bridge defects: characterization and root cause analysis
Santoro, Gaetano; Van Den Heuvel, Dieter; Braggin, Jennifer; Rosslee, Craig; Leray, Philippe; Cheng, Shaunee; Jehoul, Christiane; Schreutelkamp, Rob; Hillel, Noam (2010) -
Post-direct-CMP dielectric surface copper contamination: quantitative analysis and impact on dielectric breakdown behaviour
Heylen, Nancy; Li, Yunlong; Travaly, Youssef; Vereecke, Guy; Volders, Henny; Tokei, Zsolt; Versluijs, Janko; Rip, Jens; Beyer, Gerald; Fischer, Paul; Zhao, Larry; Santoro, Gaetano; Nguyen, Olivier; Cockburn, Andrew (2008) -
Post-direct-CMP dielectric surface copper contamination: quantitative analysis and impact on dielectric breakdown behaviour
Heylen, Nancy; Li, Yunlong; Kellens, Kristof; Travaly, Youssef; Vereecke, Guy; Volders, Henny; Tokei, Zsolt; Versluijs, Janko; Rip, Jens; Van Besien, Els; Carbonell, Laure; Beyer, Gerald; Fischer, Paul; Zhao, Larry; Santoro, Gaetano; Cockburn, Andrew; Nguyen, Olivier (2009) -
Scaled, novel effective workfunction metal gate stacks for advanced Low-VT, gate-all-around vertically stacked nanosheet FETs with reduced vertical distance between sheets
Veloso, Anabela; Simoen, Eddy; Oliveira, Alberto; Vaisman Chasin, Adrian; Chen, S.-C.; Lin, Y.; Miyashita, T.; Kim, M.; Jang, Doyoung; Ritzenthaler, Romain; Zhou, Daisy; Mertens, Hans; Pena, Vanessa; Santoro, Gaetano; Kenis, Karine; Sebaai, Farid; Mannaert, Geert; Devriendt, Katia; Hopf, Toby; Versluijs, Janko; Richard, Olivier; Machillot, Jerome; Yoshida, Naomi; Horiguchi, Naoto (2019) -
Vertically stacked gate-all-around Si nanowire CMOS transistors with reduced nanowires separation, new work function metal gate solutions, and DC/AC performance optimization
Ritzenthaler, Romain; Mertens, Hans; Pena, Vanessa; Santoro, Gaetano; Vaisman Chasin, Adrian; Kenis, Karine; Devriendt, Katia; Mannaert, Geert; Dekkers, Harold; Dangol, Anish; Lin, Yongjin; Sun, Shiyu; Chen, Zhebo; Kim, Myungsun; Chen, ShiChung; Machillot, Jerome; Mitard, Jerome; Yoshida, Naomi; Kim, Namsung; Mocuta, Dan; Horiguchi, Naoto (2018) -
Vertically stacked gate-all-around Si nanowire transistors: key process optimizations and ring oscillator demonstration
Mertens, Hans; Ritzenthaler, Romain; Pena, Vanessa; Santoro, Gaetano; Kenis, Karine; Schulze, Andreas; Dentoni Litta, Eugenio; Chew, Soon Aik; Devriendt, Katia; Chiarella, Thomas; Demuynck, Steven; Yakimets, Dmitry; Jang, Doyoung; Spessot, Alessio; Eneman, Geert; Dangol, Anish; Lagrain, Pieter; Bender, Hugo; Sun, Shiyu; Korolik, Michael; Kioussis, D.; Kim, Myungsun; Bu, Kyung-Ho; Chen, Shih Chung; Cogorno, Matt; Devrajan, J.; Machillot, Jerome; Yoshida, Naomi; Kim, Namsung; Barla, Kathy; Mocuta, Dan; Horiguchi, Naoto (2017)