Browsing by author "Okuno, Yasutoshi"
Now showing items 1-8 of 8
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Analysis of the pre-epi bake conditions on the defect creation in recessed Si1-xGex S/D junctions
Bargallo Gonzalez, Mireia; Thomas, Nicole; Simoen, Eddy; Verheyen, Peter; Hikavyy, Andriy; Leys, Frederik; Okuno, Yasutoshi; Vissouvanadin Soubaretty, Bertrand; Van Daele, Benny; Geenen, Luc; Loo, Roger; Claeys, Cor; Machkaoutsan, Vladimir; Tomasini, P.; Thomas, S.G.; Lu, J.P.; Weijtmans, J.W.; Wise, R. (2007) -
Influence of STI trench fill and dummy design on CMP behavior
Ong, Patrick; Devriendt, Katia; Redolfi, Augusto; Okuno, Yasutoshi; Hernandez, Jose Luis (2007) -
Junction anneal sequence optimization for advanced high-k / metal gate CMOS technology
Ortolland, Claude; Ragnarsson, Lars-Ake; Kerner, Christoph; Chiarella, Thomas; Rosseel, Erik; Okuno, Yasutoshi; Favia, Paola; Richard, Olivier; Everaert, Jean-Luc; Schram, Tom; Kubicek, Stefan; Absil, Philippe; Biesemans, Serge; Schreutelkamp, Robert; Hoffmann, Thomas Y. (2009) -
Novel process to pattern selectively dual dielectric capping layers using soft-mask only
Schram, Tom; Kubicek, Stefan; Rohr, Erika; Brus, Stephan; Vrancken, Christa; Chang, Shou-Zen; Chang, V.S.; Mitsuhashi, Riichiru; Okuno, Yasutoshi; Akheyar, Amal; Cho, Hag-Ju; Hooker, J.C.; Paraschiv, Vasile; Vos, Rita; Sebaai, Farid; Ercken, Monique; Kelkar, Prasad; Delabie, Annelies; Adelmann, Christoph; Witters, Thomas; Ragnarsson, Lars-Ake; Kerner, Christoph; Chiarella, Thomas; Aoulaiche, Marc; Cho, Moon Ju; Kauerauf, Thomas; De Meyer, Kristin; Lauwers, Anne; Hoffmann, Thomas Y.; Absil, Philippe; Biesemans, Serge (2008) -
Optimized ultra-low thermal budget process flow for advanced high-K / metal gate first CMOS using laser-annealing technology
Ortolland, Claude; Ragnarsson, Lars-Ake; Favia, Paola; Richard, Olivier; Kerner, Christoph; Chiarella, Thomas; Rosseel, Erik; Okuno, Yasutoshi; Akheyar, Amal; Tseng, Joshua; Everaert, Jean-Luc; Schram, Tom; Kubicek, Stefan; Aoulaiche, Marc; Cho, Moon Ju; Absil, Philippe; Biesemans, Serge; Hoffmann, Thomas Y. (2009) -
Strain enhanced Low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay
Kubicek, Stefan; Schram, Tom; Rohr, Erika; Paraschiv, Vasile; Vos, Rita; Demand, Marc; Adelmann, Christoph; Witters, Thomas; Nyns, Laura; Delabie, Annelies; Ragnarsson, Lars-Ake; Chiarella, Thomas; Kerner, Christoph; Mercha, Abdelkarim; Parvais, Bertrand; Aoulaiche, Marc; Ortolland, Claude; Yu, HongYu; Veloso, Anabela; Witters, Liesbeth; Singanamalla, Raghunath; Kauerauf, Thomas; Brus, Stephan; Vrancken, Christa; Chang, V.S.; Chang, Shou-Zen; Mitsuhashi, Riichirou; Okuno, Yasutoshi; Akheyar, Amal; Cho, Hag-Ju; Hooker, J.; O'Sullivan, Barry; Van Elshocht, Sven; De Meyer, Kristin; Jurczak, Gosia; Absil, Philippe; Biesemans, Serge; Hoffmann, Thomas Y. (2008) -
Stress memorization technique – fundamental understanding and low-cost integration for advanced CMOS technology using a nonselective process
Ortolland, Claude; Okuno, Yasutoshi; Verheyen, Peter; Kerner, Christoph; Stapelmann, Chris; Aoulaiche, Marc; Horiguchi, Naoto; Hoffmann, Thomas Y. (2009) -
Thermally-stable high effective work function TaCN thin films for metal gate electrode applications
Adelmann, Christoph; Meersschaut, Johan; Ragnarsson, Lars-Ake; Conard, Thierry; Franquet, Alexis; Sengoku, Naohisa; Okuno, Yasutoshi; Favia, Paola; Bender, Hugo; Zhao, Chao; OSullivan, barry; Rothschild, Aude; Schram, Tom; Kittl, Jorge; Van Elshocht, Sven; De Gendt, Stefan; Lehnen, Peer; Boissière, Olivier; Lohe, Christoph (2009)