Publication:

High yield sub-0.1μm² 6T-SRAM Cells, featuring high-k/metal-gate Finfet devices, double gate patterning, a novel Fin etch strategy, full-field EUV lithography and optimized junction design & layout

Date

2010
Proceedings Paper
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dc.contributor.authorHoriguchi, Naoto
dc.contributor.authorDemuynck, Steven
dc.contributor.authorErcken, Monique
dc.contributor.authorLocorotondo, Sabrina
dc.contributor.authorLazzarino, Frederic
dc.contributor.authorAltamirano Sanchez, Efrain
dc.contributor.authorHuffman, Craig
dc.contributor.authorBrus, Stephan
dc.contributor.authorDemand, Marc
dc.contributor.authorStruyf, Herbert
dc.contributor.authorDe Backer, Johan
dc.contributor.authorHermans, Jan
dc.contributor.authorDelvaux, Christie
dc.contributor.authorVandeweyer, Tom
dc.contributor.authorBaerts, Christina
dc.contributor.authorMannaert, Geert
dc.contributor.authorTruffert, Vincent
dc.contributor.authorVerluijs, j
dc.contributor.authorAlaerts, Wilfried
dc.contributor.authorDekkers, Harold
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.imecauthorDemuynck, Steven
dc.contributor.imecauthorErcken, Monique
dc.contributor.imecauthorLocorotondo, Sabrina
dc.contributor.imecauthorLazzarino, Frederic
dc.contributor.imecauthorAltamirano Sanchez, Efrain
dc.contributor.imecauthorBrus, Stephan
dc.contributor.imecauthorDemand, Marc
dc.contributor.imecauthorStruyf, Herbert
dc.contributor.imecauthorDe Backer, Johan
dc.contributor.imecauthorHermans, Jan
dc.contributor.imecauthorDelvaux, Christie
dc.contributor.imecauthorVandeweyer, Tom
dc.contributor.imecauthorBaerts, Christina
dc.contributor.imecauthorMannaert, Geert
dc.contributor.imecauthorTruffert, Vincent
dc.contributor.imecauthorAlaerts, Wilfried
dc.contributor.imecauthorDekkers, Harold
dc.contributor.imecauthorOng, Patrick
dc.contributor.imecauthorHeylen, Nancy
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.contributor.orcidimecLazzarino, Frederic::0000-0001-7961-9727
dc.contributor.orcidimecHermans, Jan::0000-0003-1249-8902
dc.contributor.orcidimecTruffert, Vincent::0000-0001-7851-830X
dc.contributor.orcidimecDekkers, Harold::0000-0003-4778-5709
dc.contributor.orcidimecOng, Patrick::0000-0002-2072-292X
dc.contributor.orcidimecHikavyy, Andriy::0000-0002-8201-075X
dc.contributor.orcidimecRonse, Kurt::0000-0003-0803-4267
dc.contributor.orcidimecAltamirano Sanchez, Efrain::0000-0003-3235-6055
dc.contributor.orcidimecBrus, Stephan::0000-0003-3554-0640
dc.contributor.orcidimecStruyf, Herbert::0000-0002-6782-5424
dc.date.accessioned2021-10-18T17:09:11Z
dc.date.available2021-10-18T17:09:11Z
dc.date.embargo9999-12-31
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17276
dc.source.beginpage23
dc.source.conferenceIEEE Symposium on VLSI Technology
dc.source.conferencedate15/06/2010
dc.source.conferencelocationHonolulu, HI USA
dc.source.endpage24
dc.title

High yield sub-0.1μm² 6T-SRAM Cells, featuring high-k/metal-gate Finfet devices, double gate patterning, a novel Fin etch strategy, full-field EUV lithography and optimized junction design & layout

dc.typeProceedings paper
dspace.entity.typePublication
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