Publication:

Validation of retention modeling as a trap-profiling technique for SiN-based charge-trapping memories

Date

2010
Journal article
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dc.contributor.authorSuhane, Amit
dc.contributor.authorArreghini, Antonio
dc.contributor.authorDegraeve, Robin
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorBreuil, Laurent
dc.contributor.authorZahid, Mohammed
dc.contributor.authorJurczak, Gosia
dc.contributor.authorDe Meyer, Kristin
dc.contributor.authorVan Houdt, Jan
dc.contributor.imecauthorArreghini, Antonio
dc.contributor.imecauthorDegraeve, Robin
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorBreuil, Laurent
dc.contributor.imecauthorJurczak, Gosia
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.orcidimecArreghini, Antonio::0000-0002-7493-9681
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.contributor.orcidimecBreuil, Laurent::0000-0003-2869-1651
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.date.accessioned2021-10-18T22:04:49Z
dc.date.available2021-10-18T22:04:49Z
dc.date.embargo9999-12-31
dc.date.issued2010
dc.identifier.issn0741-3106
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18052
dc.source.beginpage77
dc.source.endpage79
dc.source.issue1
dc.source.journalIEEE Electron Device Letters
dc.source.volume31
dc.title

Validation of retention modeling as a trap-profiling technique for SiN-based charge-trapping memories

dc.typeJournal article
dspace.entity.typePublication
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