Publication:

Modeling the effect of charges in the back side passivation layer on through silicon via (TSV) capacitance after wafer thinning

Date

2015
Proceedings Paper
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dc.contributor.authorRack, Martin
dc.contributor.authorStucchi, Michele
dc.contributor.authorSun, Xiao
dc.contributor.authorRoda Neve, Cesar
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorBeyne, Eric
dc.contributor.authorAbsil, Philippe
dc.contributor.authorRaskin, J-P
dc.contributor.imecauthorStucchi, Michele
dc.contributor.imecauthorSun, Xiao
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorBeyne, Eric
dc.contributor.imecauthorAbsil, Philippe
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.accessioned2021-10-22T22:01:11Z
dc.date.available2021-10-22T22:01:11Z
dc.date.issued2015
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/25787
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7167022
dc.source.beginpage1
dc.source.conferenceIEEE MTT-S International Microwave Symposium - IMS
dc.source.conferencedate17/05/2015
dc.source.conferencelocationPhoenix, AZ USA
dc.source.endpage4
dc.title

Modeling the effect of charges in the back side passivation layer on through silicon via (TSV) capacitance after wafer thinning

dc.typeProceedings paper
dspace.entity.typePublication
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