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Browsing by Author "Agopian, Paula G. D."

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    Analog Figures of Merit of Vertically Stacked Silicon Nanosheets nMOSFETs With Two Different Metal Gates for the Sub-7 nm Technology Node Operating at High Temperatures

    Silva, Vanessa C. P.
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    Perina, Welder F.
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    Martino, Joao A.
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    Simoen, Eddy  
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    Veloso, Anabela  
    Journal article
    2021, IEEE TRANSACTIONS ON ELECTRON DEVICES, (68) 7, p.3630-3635
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    Analysis of the ZTC-Point for Vertically Stacked Nanosheet pMOS Devices

    Coelho, Carlos H. S.
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    Martino, Joao A.
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    Simoen, Eddy  
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    Veloso, Anabela  
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    Agopian, Paula G. D.
    Proceedings paper
    2021, Latin America Electron Devices Conference (LAEDC), APR 19-21, 2021
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    Analysis of zero-temperature coefficient behavior on vertically stacked double nanosheet nMOS devices

    Coelho, Carlos H. S.
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    Martino, Joao A.
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    Bellodi, Marcello
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    Simoen, Eddy  
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    Veloso, Anabela  
    Journal article
    2021, MICROELECTRONICS JOURNAL, 117, p.105277
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    Design of operational transconductance amplifier with Gate-All-Around Nanosheet MOSFET using experimental data from room temperature to 200 degrees C

    Sousa, Julia C. S.
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    Perina, Welder F.
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    Rangel, Roberto
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    Simoen, Eddy  
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    Veloso, Anabela  
    Journal article
    2022, SOLID-STATE ELECTRONICS, (189) March, p.108238
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    Experimental Analysis of Trade-Off Between Transistor Efficiency and Unit Gain Frequency of Nanosheet NMOS Transistors

    Silva, Vanessa C. P.
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    Martino, Joao A.
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    Simoen, Eddy  
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    Veloso, Anabela  
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    Agopian, Paula G. D.
    Proceedings paper
    2021, 35th Symposium on Microelectronics Technology and Devices (SBMicro), AUG 23-27, 2021
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    Experimental comparison between pMuGTFET and pFinFET analog performance as a function of temperature

    Agopian, Paula G. D.
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    Martino, Joo Antonio
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    Rooyackers, Rita
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    Vandooren, Anne  
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    Simoen, Eddy  
    Journal article
    2013, IEEE Transactions on Electron Devices, (60) 8, p.2493-2497
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    Experimental study of MISHEMT from 450 K down to 200 K for analog applications

    Perina, Welder F.
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    Martino, Joao Antonio  
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    Simoen, Eddy  
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    Peralagu, Uthayasankaran  
    Journal article
    2023, SOLID-STATE ELECTRONICS, (208) October, p.Art. 108742
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    High Temperature Influence on the Trade-off between gm/I-D and f(T) of nanosheet NMOS Transistors with Different Metal Gate Stack

    Silva, Vanessa C. P.
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    Martino, Joao A.
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    Simoen, Eddy  
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    Veloso, Anabela  
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    Agopian, Paula G. D.
    Proceedings paper
    2021, Joint International EUROSOI Workshop / International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS), SEP 01-03, 2021
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    Impact of gate current on the operational transconductance amplifier designed with nanowire TFETs

    Nogueira, Alexandro de M.
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    Agopian, Paula G. D.
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    Simoen, Eddy  
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    Rooyackers, Rita
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    Claeys, Cor
    Journal article
    2021, SOLID-STATE ELECTRONICS, 186, p.108099
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    Influence of the Ge amount at the source on transistor efficiency of vertical gate all around TFETs for different conduction regimes

    Mendes Bordallo, Ciao Cesar
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    Sivieri, Victor B.
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    Martino, Joao Antonio
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    Agopian, Paula G. D.
    Proceedings paper
    2016, Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon -ULIS, 25/01/2016, p.P23
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    Low frequency noise analysis and modeling in vertical tunnel FETs with Ge Source

    Neves, Felipe
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    Agopian, Paula G. D.
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    Martino, Joao A.
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    Cretu, Bogdan
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    Rooyackers, Rita
    Journal article
    2016, IEEE Transactions on Electron Devices, (63) 4, p.1658-1665
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    Operational Transconductance Amplifier Design with Gate- All-Around Nanosheet MOSFET using Experimental Lookup Table Approach

    Sousa, Julia C. S.
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    Perina, Welder F.
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    Simoen, Eddy  
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    Veloso, Anabela  
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    Martino, Joao A.
    Proceedings paper
    2021, Joint International EUROSOI Workshop / International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS), SEP 01-03, 2021
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    Operational Transconductance Amplifier Designed with SiGe-source Nanowire Tunnel-FET using Experimental Lookup Table Model

    Nogueira, Alexandro de M.
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    Agopian, Paula G. D.
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    Simoen, Eddy  
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    Rooyackers, Rita
    ;
    Claeys, Cor
    Proceedings paper
    2020, Joint International EUROSOI Workshop / International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), SEP 01-30, 2020
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    Study of the effect of multiple conductions on threshold voltage in a MIS-HEMT from 450 K down to 200 K

    Perina, Welder F.
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    Martino, Joao A.
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    Simoen, Eddy  
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    Peralagu, Uthayasankaran  
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    Collaert, Nadine  
    Proceedings paper
    2023, 37th Symposium on Microelectronics Technology and Devices (SBMicro), AUG 28-SEP 01, 2023
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    Temperature influence on experimental analog behavior of MISHEMTs

    Perina, Welder F.
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    Martino, Joao A.
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    Simoen, Eddy
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    Peralagu, Uthayasankaran  
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    Collaert, Nadine  
    Journal article
    2025, SOLID-STATE ELECTRONICS, (223) January, p.Art. 109028
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    Trade-off analysis between gm/I-D and f(T) of nanosheet NMOS transistors with different metal gate stack at high temperature

    Silva, Vanessa C. P. A.
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    Martino, Joao A.
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    Simoen, Eddy  
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    Veloso, Anabela  
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    Agopian, Paula G. D.
    Journal article
    2022, SOLID-STATE ELECTRONICS, 191, p.108267
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    Two-Stage Transconductance Operational Amplifier designed with VFET experimental data

    Ribeiro, Arllen D. R.
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    Silva, Vanessa C. P.
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    Martino, Joao A.
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    Veloso, Anabela  
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    Horiguchi, Naoto  
    Proceedings paper
    2024, 38th Symposium on Microelectronics Technology and Devices (SBMicro), SEP 02-06, 2024

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