Browsing by Author "Lee, Willie"
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Publication A 35nm diameter vertical silicon nanowire short-gate tunnelFET
Proceedings paper2009, Nanotechnology Workshop, 13/06/2009Publication A 400GHz fMAX fully self-aligned SiGe:C HBT architecture
Proceedings paper2009-10, IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM, 13/10/2009, p.5-8Publication Defect-free isolation on high-thermal-conductivity SOI substrates for complementary BiCMOS technology
;Van Wichelen, Koen; ; ; ; Proceedings paper2009, International Conference on Solid State Devices and Materials - SSDM, 6/10/2009, p.824-825Publication Fabrication of high qualtiy Ge virtual substrates by selective epitaxial growth in shallow trench isolated Si (001) trenches
;Wang, Gang; ;Takeuchi, Shotaro; ;Lin, Vic; Journal article2010, Thin Solid Films, (518) 9, p.2538-2541Publication Low-voltage, low-loss, multi-Gb/s silicon mirco-ring modulator based on a MOS capacitor
Proceedings paper2012, The Optical Fiber Communication Conference and Exposition - OFC and The National Fiber Optic Engineers Conference - NFOEC, 4/03/2012, p.OM2E4Publication Oxide CMP steps in the integration of vertical Si nanowire tunnelFET devices
Proceedings paper2010, International Conference on Planarization Technology - ICPT, 14/11/2010Publication Pedestal collector optimization for high speed SiGe:C HBT
Proceedings paper2011, Bipolar/BiCMOS Circuits and Technology Meeting - BCTM, 9/10/2011Publication TEM analysis of Ge-on-Si MOSFET structures with HfO2 dielectric for high performance PMOS device technology
;Norris, D.J. ;Walther, T. ;Cullis, A.G. ;Myronov, M. ;Dobbie, A. ;Whall, T.Parker, E.H.C.Journal article2010, Journal of Physics Conference Series, (209) 1, p.12061Publication TEM analysis of Si-passivated Ge-on-Si MOSFET structures for high performance PMOS device technology
;Norris, D.J. ;Ross, I.M. ;Cullis, A.G. ;Walther, T. ;Myronov, M. ;Dobbie, A.Whall, T.Journal article2010, Journal of Physics Conference Series, (241) 1, p.12044