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Browsing by Author "Nakazawa, Masashi"

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    Defect formation in III-V fin grown by aspect ratio trapping technique: a first-principles study

    Minari, Hideki
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    Yoshida, Shinichi
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    Sawada, Ken
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    Nakazawa, Masashi
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    Pourtois, Geoffrey  
    Proceedings paper
    2014, IEEE International Reliability Physics Symposium - IRPS, 1/06/2014, p.PI.2
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    First-principles studies of the defect formation in III-V FETs grown by aspect ratio trapping

    Minari, Hideki
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    Yoshida, Shinichi
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    Sawada, Ken
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    Nakazawa, Masashi
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    Caymax, Matty  
    Meeting abstract
    2014, 226th Meeting of The Electrochemical Society, 5/10/2014, p.1646
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    First-principles studies of the defect formation in III-V FETs grown by aspect ratio trapping

    Minari, Hideki
    ;
    Yoshida, Shinichi
    ;
    Sawada, Ken
    ;
    Nakazawa, Masashi
    ;
    Merckling, Clement  
    Proceedings paper
    2014, High Purity and High Mobility Semiconductors 13, 5/10/2014, p.111-123
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    Systematic study of interfacial reactions induced by metal electrodes in high-k/InGaAs gate stacks

    Yoshida, Shinichi
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    Lin, Dennis  
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    Vais, Abhitosh  
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    Alian, AliReza  
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    Franco, Jacopo  
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    El Kazzi, Salim
    Journal article
    2016, Applied Physics Letters, (109) 17, p.172101
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    The impact of energy barrier height on border traps in III-V gate stacks

    Yoshida, S.
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    Taniguchi, S.
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    Minari, Hideki
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    Lin, Dennis  
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    Ivanov, Tsvetan  
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    Watanabe, H.
    Proceedings paper
    2015, Extended Abstracts of International Workshop on Dielectric Thin Films for Future Electron Devices - IWDTF, 2/11/2015, p.75-76

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