Browsing by Author "Pena, Vanessa"

3D-carrier profiling and parasitic resistance analysis in vertically stacked gate-all-around Si nanowire CMOS transistors

Scaled, novel effective workfunction metal gate stacks for advanced Low-VT, gate-all-around vertically stacked nanosheet FETs with reduced vertical distance between sheets

Selective metal-organic chemical vapor deposition growth of high quality GaAs on Si(001)

Si/SiGe superlattice I/O finFETs in a vertically-stacked gate-all-around horizontal nanowire technology

Vertically stacked gate-all-around Si nanowire CMOS transistors with reduced nanowires separation, new work function metal gate solutions, and DC/AC performance optimization

Vertically stacked gate-all-around Si nanowire transistors: key process optimizations and ring oscillator demonstration