Browsing by Author "Rawat, Amita"
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Publication Device Scaling roadmap and its implications for Logic and Analog platform
Proceedings paper2020, IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), NOV 16-19, 2020Publication EUV lithography and its enablement of future generations of semiconductor devices
Oral presentation2020, 2020 EUVL WorkshopPublication Experimental Validation of Process-Induced Variability Aware SPICE Simulation Platform for Sub-20 nm FinFET Technologies
Journal article2021, IEEE TRANSACTIONS ON ELECTRON DEVICES, (68) 3, p.976-980Publication Investigation of Dielectric and Quantum Confinement Based Dopant Deactivation in the Extension Region of FinFET
Journal article2022, IEEE ELECTRON DEVICE LETTERS, (43) 8, p.1171-1174Publication Performance Trade-Off Scenarios for GAA Nanosheet FETs Considering Inner- spacers and Epi-induced Stress: Understanding & Mitigating Process Risks
; ; ; ; ; Proceedings paper2021, 47th IEEE European Solid State Circuits Conference (ESSCIRC), SEP 13-22, 2021, p.55-58Publication Performance Trade-Off Scenarios for GAA Nanosheet FETs Considering Inner-spacers and Epi-induced Stress: Understanding & Mitigating Process Risks
Proceedings paper2021, IEEE 51st European Solid-State Device Research Conference (ESSDERC), SEP 06-09, 2021, p.55-58