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Browsing by Author "Storck, Peter"

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    Epitaxial growth of active Si on top of SiGe etch stop layer in view of 3D device integration

    Loo, Roger  
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    Jourdain, Anne  
    ;
    Rengo, Gianluca  
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    Porret, Clément  
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    Hikavyy, Andriy  
    ;
    Liebens, Maarten  
    Proceedings paper
    2020-09, PRiME 2020: Semiconductor Wafer Bonding: Science, Technology, and Applications 16, 4/10/2020, p.157-166
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    Epitaxial growth of active Si on top of SiGe etch stop layer in view of 3D device integration

    Loo, Roger  
    ;
    Jourdain, Anne  
    ;
    Rengo, Gianluca  
    ;
    Porret, Clément  
    ;
    Hikavyy, Andriy  
    ;
    Liebens, Maarten  
    Meeting abstract
    2020-07, ECS 2020 Fall Meeting (PRiME): Symposium G01 Semiconductor Wfr Bonding; Science Technology and Applications 16, 4/10/2020, p.G03-1640
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    Smooth and high quality epitaxial strained Ge grown on SiGe strain relaxed buffers with 70 - 85% Ge

    Loo, Roger  
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    Souriau, Laurent  
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    Ong, Patrick  
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    Kenis, Karine  
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    Rip, Jens  
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    Storck, Peter
    Proceedings paper
    2010-05, 5th International SiGe Technology and Device Meeting - ISTDM, 24/05/2010
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    Strained germanium gate-all-around pMOS device demonstration using selective wire release etch prior to replacement metal gate deposition

    Witters, Liesbeth  
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    Arimura, Hiroaki  
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    Sebaai, Farid  
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    Hikavyy, Andriy  
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    Milenin, Alexey  
    ;
    Loo, Roger  
    Journal article
    2017, IEEE Transactions on Electron Devices, (64) 4, p.4587-4593
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    Strained germanium gate-all-around PMOS device demonstration using selective wire release etch prior to replacement metal gate deposition

    Witters, Liesbeth  
    ;
    Sebaai, Farid  
    ;
    Hikavyy, Andriy  
    ;
    Milenin, Alexey  
    ;
    Loo, Roger  
    Proceedings paper
    2017-06, Symposium on VLSI Technology, 5/06/2017, p.194-195

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