Browsing by author "Felch, S.B."
Now showing items 1-7 of 7
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Advanced front-end processes for the 45nm CMOS technology node
Collart, E.J.H.; Felch, S.B.; Graoui, H.; Tallavarjula, S.; Lindsay, Richard; Pawlak, Bartek; van den Berg, J.A.; Cowern, N.E.B.; Kirby, K.J. (2004) -
Co-implantation with conventional spike anneal solutions for 45 nm ultra-shallow junction formation
Collart, E.H.; Felch, S.B.; Graoui, H.; Kirkwood, D.; Pawlak, Bartek; Absil, Philippe; Severi, Simone; Janssens, Tom; Vandervorst, Wilfried (2005) -
Junction architecture for planar devices
Pawlak, Bartek; Duffy, R.; Hoffmann, Thomas Y.; Severi, Simone; Felch, S.B.; Eyben, Pierre; Van Daele, Benny; Vandervorst, Wilfried; Lander, Rob (2007) -
Laser-annealed junctions with advanced CMOS gate stacks for 32nm node: perspectives on device performance and manufacturability
Ortolland, Claude; Noda, Taiji; Chiarella, Thomas; Kubicek, Stefan; Kerner, Christoph; Vandervorst, Wilfried; Opdebeeck, Ann; Vrancken, Christa; Horiguchi, Naoto; de Potter de ten Broeck, Muriel; Aoulaiche, Marc; Rosseel, Erik; Felch, S.B.; Absil, Philippe; Schreutelkamp, Rob; Biesemans, Serge; Hoffmann, Thomas Y. (2008) -
Performance and leakage optimization in carbon and fluorine C0-implanted pMOSFETs
Pawlak, Bartek; Duffy, Ray; Hooker, Jacob; Hoffmann, Thomas; Felch, S.B.; Eyben, Pierre; Absil, Philippe; Lander, Rob (2008) -
Ultra shallow junctions formed by sub-melt laser annealing
Falepin, Annelies; Janssens, Tom; Severi, Simone; Vandervorst, Wilfried; Felch, S.B.; Parihar, V.; Mayur, A. (2005) -
Ultra-shallow junctions formed by C co-implantation with spkie plus sub-melt laser annealing
Felch, S.B.; Collart, E.; Parihar, V.; Thirupapulyur, S.; Schreutelkamp, R.; Pawlak, Bartek; Hoffmann, Thomas Y.; Severi, Simone; Eyben, Pierre; Vandervorst, Wilfried; Noda, Taiji (2008)