Browsing by author "Hellings, Geert"
Now showing items 41-60 of 223
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Concise analytical expression for Wunsch-Bell 1-D pulsed heating and applications in ESD using TLP
Hellings, Geert; Roussel, Philippe; Wang, Nian; Boschke, Roman; Chen, Shih-Hung; Simicic, Marko; Scholz, Mirko; Steudel, Soeren; Myny, Kris; Linten, Dimitri; Hellings, Paul; Ashif, Nowab (2019) -
Defect characterization after ESD stress: merging TLP and Pulsed-IV techniques
Linten, Dimitri; Ji, Zhigang; Boschke, Roman; Hellings, Geert; Chen, Shih-Hung; Scholz, Mirko; Alian, AliReza; Collaert, Nadine; Thean, Aaron (2015) -
Defects and electrical performance of germanium PMOS devices
Eneman, Geert; Simoen, Eddy; Yang, Rui; De Jaeger, Brice; Wang, Gang; Mitard, Jerome; Hellings, Geert; Brunco, David; Loo, Roger; De Meyer, Kristin; Claeys, Cor; Meuris, Marc; Heyns, Marc (2009) -
Defects, junction leakage and electrical performance of Ge pFET devices
Eneman, Geert; Simoen, Eddy; Yang, Rui; De Jaeger, Brice; Wang, Gang; Mitard, Jerome; Hellings, Geert; Brunco, David; Loo, Roger; De Meyer, Kristin; Caymax, Matty; Claeys, Cor; Meuris, Marc; Heyns, Marc (2009) -
Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipole
Franco, Jacopo; Vais, Abhitosh; Sioncke, Sonja; Putcha, Vamsi; Kaczer, Ben; Shie, Bo-Shiuan; Shi, Xiaoping; Reyhaneh, Mahlouji; Nyns, Laura; Zhou, Daisy; Waldron, Niamh; Maes, Jan; Xie, Qi; Givens, M.; Tang, F.; Jiang, X.; Arimura, Hiroaki; Schram, Tom; Ragnarsson, Lars-Ake; Sibaja-Hernandez, Arturo; Hellings, Geert; Horiguchi, Naoto; Heyns, Marc; Groeseneken, Guido; Linten, Dimitri; Collaert, Nadine; Thean, Aaron (2016) -
Demonstration of sufficient BTI reliability for a 14-nm FinFET 1.8V I/O technology featuring a thick ALD SiO2 IL and Ge p-channel
Hellings, Geert; Subirats, Alexandre; Franco, Jacopo; Schram, Tom; Ragnarsson, Lars-Ake; Witters, Liesbeth; Roussel, Philippe; Linten, Dimitri; Horiguchi, Naoto; Boschke, Roman (2017) -
Design and analysis of a new In53Ga47As implant-free quantum-well device structure
Benbakhti, Brahim; Kalna, Karol; Chan, KahHou; Asenov, Asen; Hellings, Geert; Eneman, Geert; De Meyer, Kristin; Meuris, Marc (2010) -
Design and analysis of the In sub(0.53)Ga sub(0.47)As implant-free quantum-well device structure
Benbakhti, Brahim; Kalna, Karol; Chan, KanHou; Towie, Ewan; Hellings, Geert; Eneman, Geert; De Meyer, Kristin; Meuris, Marc; Asenov, Asen (2011) -
Design and Optimization of SRAM Macro and Logic Using Backside Interconnects at 2nm node
Chen, Rongmei; Sisto, Giuliano; Jourdain, Anne; Hiblot, Gaspard; Stucchi, Michele; Kakarla, Naveen; Chehab, Bilal; Salahuddin, Shairfe Muhammad; Schleicher, Filip; Veloso, Anabela; Hellings, Geert; Weckx, Pieter; Milojevic, Dragomir; Van der Plas, Geert; Ryckaert, Julien; Beyne, Eric (2021) -
Device architectures and their integration challenges for 1x nm node: FinFETs and high mobility channel
Horiguchi, Naoto; Zschaetzsch, Gerd; Sasaki, Yuichiro; Kambham, Ajay Kumar; Togo, Mitsuhiro; Cho, Moon Ju; Ragnarsson, Lars-Ake; Hellings, Geert; Mitard, Jerome; Franco, Jacopo; Eneman, Geert; Witters, Liesbeth; Waldron, Niamh; Lin, Dennis; Pantisano, Luigi; Collaert, Nadine; Vandervorst, Wilfried; Thean, Aaron (2012-09) -
Discussion on the figures of merit of identified traps located in the Si flm: surface versus volume trap densities
Cretu, Bogdan; Simoen, Eddy; Hellings, Geert; Linten, Dimitri; Claeys, Cor (2020) -
Disruptive Technology Elements, and Rapid and Accurate Block-Level Performance Evaluation for 3nm and Beyond
Na, Myung Hee; Jang, Doyoung; Baert, Rogier; Sarkar, Satadru; Patli, Sudhir; Zografos, Odysseas; Chehab, Bilal; Spessot, Alessio; Sisto, Giuliano; Schuddinck, Pieter; Mertens, Hans; Oniki, Yusuke; Hellings, Geert; Dentoni Litta, Eugenio; Ryckaert, Julien; Horiguchi, Naoto (2021) -
Double-gate Si junction-less n-type transistor for high performance Cu-BEOL compatible applications using 3D sequential integration
Vandooren, Anne; Witters, Liesbeth; Vecchio, Emma; Kunnen, Eddy; Hellings, Geert; Peng, Lan; Inoue, Fumihiro; Li, Waikin; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Dual-channel technology with Cap-free single metal gate for high performance CMOS in gate-first and gate-last integration
Witters, Liesbeth; Mitard, Jerome; Veloso, Anabela; Hikavyy, Andriy; Franco, Jacopo; Kauerauf, Thomas; Cho, Moon Ju; Schram, Tom; Sebaai, Farid; Yamaguchi, Shinpei; Takeoka, S.; Fukuda, Masahiro; Wang, Wei-E; Duriez, Blandine; Eneman, Geert; Loo, Roger; Kellens, Kristof; Tielens, Hilde; Favia, Paola; Rohr, Erika; Hellings, Geert; Bender, Hugo; Roussel, Philippe; Crabbe, Yvo; Brus, Stephan; Mannaert, Geert; Kubicek, Stefan; Devriendt, Katia; De Meyer, Kristin; Ragnarsson, Lars-Ake; Steegen, An; Horiguchi, Naoto (2011) -
Electrical TCAD simulation of a germanium pMOSFET technology
Hellings, Geert; Eneman, Geert; Krom, Raymond; De Jaeger, Brice; Mitard, Jerome; De Keersgieter, An; Hoffmann, Thomas Y.; Meuris, Marc; De Meyer, Kristin (2010) -
Electrostatic discharge robustness of amorphous indium-gallium-zinc-oxide thin-film transistors
Simicic, Marko; Ashif, Nowab Reza; Hellings, Geert; Chen, Shih-Hung; Nag, Manoj; Kronemeijer, Auke Jisk; Myny, Kris; Linten, Dimitri (2020-04-03) -
Emerging challenges of ESD protections in FinFET technologies
Chen, Shih-Hung; Linten, Dimitri; Hellings, Geert; Scholz, Mirko; Groeseneken, Guido (2013) -
Epitaxial growth in advanced MOS devices: challenges and solutions
Loo, Roger; Hikavyy, Andriy; Vincent, Benjamin; Gencarelli, Federica; Witters, Liesbeth; Mitard, Jerome; Hellings, Geert; Sioncke, Sonja; Caymax, Matty; Bender, Hugo; Simoen, Eddy; Eneman, Geert; Vandervorst, Wilfried; Thean, Aaron (2012-05) -
Epitaxial growth in advanced SiGe and Ge MOS devices: challenges and solutions
Loo, Roger; Vincent, Benjamin; Hikavyy, Andriy; Gencarelli, Federica; Eneman, Geert; Witters, Liesbeth; Mitard, Jerome; Hellings, Geert; Sioncke, Sonja; Bender, Hugo; Eyben, Pierre; Caymax, Matty; Vandervorst, Wilfried; Thean, Aaron (2012-09)