Browsing by author "Claeys, Cor"
Now showing items 41-60 of 1170
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Analog parameters of MuGFET devices with different source/drain engineering
Galeti, M.; Rodrigues, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Aoulaiche, Marc; Claeys, Cor (2012) -
Analog parameters of solid source Zn diffusion InXGa1-XAs nTFETs down to 10K
Mendes Bordallo, Caio Cesar; Martino, Joao Antonio; Agopian, Paula Ghedini; Alian, AliReza; Mols, Yves; Rooyackers, Rita; Vandooren, Anne; Verhulst, Anne; Smets, Quentin; Simoen, Eddy; Claeys, Cor; Collaert, Nadine (2016) -
Analog performance at room and low temperature of triple-gate devices: Bulk, DTMOS, BOI and SOI
Andrade, M.G.C.; Martino, J.A.; Simoen, Eddy; Claeys, Cor (2012) -
Analog performance of 60 MeV proton-irradiated SOI MuGFETs with different strain technologies
Agopian, P.G.D.; Martino, J.A.; Kobayashi, Daisuke; Poizat, M.; Simoen, Eddy; Claeys, Cor (2011) -
Analog performance of SOI FinFETs with different TiN gate electrode thickness
Galeti, M.; Rodrigues, M.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor; Martino, J.A. (2010) -
Analog performance of SOI MOSFETs with different TiN gate electrode thickness and hHigh-k dielectrics
Galeti, M.; Rodrigues, M.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor; Martino, J.A. (2011) -
Analog performance of standard and strained triple-gate nFINFETS
Pavanello, M.A.; Martino, J.A.; Simoen, Eddy; Rooyackers, Rita; Collaert, Nadine; Claeys, Cor (2008) -
Analog performance of standard and uinaxial strained triple-gate SOI FinFET under X-ray radiation
Bordallo, Caio; Teixeira, Fernando; Silveira, Marcilei; Agopian, Paula G.D.; Martino, Joao A.; Simoen, Eddy; Claeys, Cor (2014) -
Analog performance of vertical nanowireTFETs as a function of temperature and transport mechanism
Dalle Valle Martino, Marcio; Neves Souza, Felipe; Ghedini der Agopian, Paula; Martino, Joao Antonio; Vandooren, Anne; Rooyackers, Rita; Simoen, Eddy; Thean, Aaron; Claeys, Cor (2015) -
Analysis of analog parameters on in NW-TFETs with Si and SiGe source composition for at high temperatures
Bordallo, Caio; Martino, Joao A.; Agopian, Paula; Rooyackers, Rita; Vandooren, Anne; Thean, Aaron; Simoen, Eddy; Claeys, Cor (2015) -
Analysis of border traps in high-k gate dielectrics on high-mobility channels
Simoen, Eddy; Lin, Dennis; Alian, AliReza; Brammertz, Guy; Merckling, Clement; Mitard, Jerome; Claeys, Cor (2013) -
Analysis of carrier mobility in triple gate SOI nFinFET combining rotated substrate and strain
Ribeiro, Thales; Simoen, Eddy; Claeys, Cor; Martino, Joao A.; Pavanello, Marcello (2016) -
Analysis of current mirror circuits designed with line tunnel FET devices at different temperatures
Martino, Marcio D.V.; Martino, Joao A.; Agopian, Paula G.D.; Vandooren, Anne; Rooyackers, Rita; Simoen, Eddy; Claeys, Cor (2017) -
Analysis of deep submicron bulk and fully depleted SOI nMOSFET analog operation at cryogenic temperatures
Pavanello, M.A.; Martino, J.A.; Simoen, Eddy; Claeys, Cor (2005) -
Analysis of halo implant influence on the self-heating and self-heating enhanced impact ionization on 0.13μm floating-body partially-depleted SOI MOSFET at low temperature
Pavanello, M.A.; Martino, J.; Simoen, Eddy; Mercha, Abdelkarim; Claeys, Cor; van Meer, Hans; De Meyer, Kristin (2003) -
Analysis of junction leakage in advanced germanium p+/n junctions
Eneman, Geert; Sicart i Casain, Oriol; Simoen, Eddy; Brunco, David; De Jaeger, Brice; Satta, Alessandra; Nicholas, Gareth; Claeys, Cor; Meuris, Marc; Heyns, Marc (2007) -
Analysis of oxygen thermal donor formation in n-type CZ silicon
Rafi, Joan Marc; Simoen, Eddy; Claeys, Cor; Ulyashin, A.G.; Job, R.; Fahrner, W.R.; Versluys, J.; Clauws, P.; Lozano, M.; Campabadal, F. (2003) -
Analysis of standard and strained FinFET operation in source-follower buffer configuration
Pavanello, M.A.; Martino, J.A.; Simoen, Eddy; Rooyackers, Rita; Collaert, Nadine; Claeys, Cor (2009) -
Analysis of temperature variation influence on the analog performance of 45° rotated triple-gate nMuGFETs
Pavanello, Marcelo Antonio; de Souza, Michelly; Martino, Joao Martino; Simoen, Eddy; Claeys, Cor (2012) -
Analysis of temperature-induced saturation threshold voltage degradation in deep-submicron ultrathin SOI MOSFETs
Pavanello, M.A.; Martino, J.A.; Simoen, Eddy; Claeys, Cor (2005)