Now showing items 6529-6548 of 41358

    • Bump pad design and its impact on the reliability of flip chip packages 

      Gonzalez, Mario; Lofrano, Melina; Vanstreels, Kris; Zahedmanesh, Houman; Beyne, Eric (2018)
    • Bupropion for attention deficit hyperactivity disorder (ADHD) in adults 

      Verbeeck, Wim; Bekkering, Geertruida E.; Van den Noortgate, Wim (2017-10)
    • Buried Bitline for sub-5nm SRAM Design 

      Mathur, R.; Bhargava, M.; Annamalai, S.; Chong, Y. K.; Sinha, S.; Cline, B.; Kulkarni, J. P.; Salahuddin, Shairfe Muhammad; Schuddinck, Pieter; Ryckaert, Julien; Gupta, Anshul (2020)
    • Buried Interconnects for Sub-5 nm SRAM Design 

      Mathur, R.; Bhargava, M.; Cline, B.; Salahuddin, Shairfe Muhammad; Gupta, Anshul; Schuddinck, Pieter; Ryckaert, Julien; Kulkarni, J.P. (2022)
    • Buried interface and buried film analysis using lab-scale Haxpes instruments 

      Conard, Thierry; Zborowski, Charlotte; Vanleenhove, Anja; Hoflijk, Ilse; Vaesen, Inge; van der Heide, Paul (2021)
    • Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications 

      Vandooren, Anne; Wu, Zhicheng; Khaled, Ahmad; Franco, Jacopo; Parvais, Bertrand; Li, W.; Witters, Liesbeth; Walke, Amey; Peng, Lan; Rassoul, Nouredine; Matagne, Philippe; Jamieson, Geraldine; Inoue, Fumihiro; Nguyen, B.Y.; Debruyn, Haroen; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Zheng, T.; Radisic, Dunja; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Besnard, G.; Schwarzenbach, W.; Gaudin, G.; Radu, Iuliana; Waldron, Niamh; De Heyn, Vincent; Demuynck, Steven; Boemmels, Juergen; Ryckaert, Julien; Collaert, Nadine; Mocuta, Dan (2019)
    • Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node 

      Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)
    • Buried power rail integration with FinFETs for ultimate CMOS scaling 

      Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020)
    • Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node 

      Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020)
    • Buried Power Rail Metal exploration towards the 1 nm Node 

      Gupta, Anshul; Radisic, Dunja; Maes, J.W.; Varela Pedreira, Olalla; Soulie, Jean-Philippe; Jourdan, Nicolas; Mertens, Hans; Bandyopadhyay, Sudip; Le, Quoc Toan; Pacco, Antoine; Heylen, Nancy; Vandersmissen, Kevin; Devriendt, Katia; Zhu, C.; Datta, S.; Sebaai, Farid; Wang, S.; Mousa, M.; Lee, J.; Geypen, Jef; De Wachter, Bart; Chehab, Bilal; Salahuddin, Shairfe Muhammad; Murdoch, Gayle; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021)
    • Buried Power Rail Scaling and Metal Assessment for the 3 nm Node and Beyond 

      Gupta, Anshul; Varela Pedreira, Olalla; Tao, Zheng; Mertens, Hans; Radisic, Dunja; Jourdan, Nicolas; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Chehab, Bilal; Jang, Doyoung; Hellings, Geert; Sebaai, Farid; Lorant, Christophe; Teugels, Lieve; Peter, Antony; Chan, BT; Schleicher, Filip; Demonie, Ingrid; Marien, Philippe; Sepulveda Marquez, Alfonso; Richard, Olivier; Nagesh, Nishanth; Lesniewska, Alicja; Lazzarino, Frederic; Ryckaert, Julien; Morin, Pierre; Altamirano Sanchez, Efrain; Murdoch, Gayle; Boemmels, Juergen; Demuynck, Steven; Na, Myung Hee; Tokei, Zsolt; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2020)
    • Buried power rails and back-side power grids: ARM CPU power delivery network design beyond 5nm 

      Prasad, D.; Nibhanupudi, S.; Das, S.; Zografos, Odysseas; Chehab, Bilal; Sarkar, Satadru; Baert, Rogier; Robinson, A.; Gupta, Anshul; Spessot, Alessio; Debacker, Peter; Verkest, Diederik; Kulkarni, J.; Cline, B.; Sinha, S. (2019)
    • Buried Power Rails and Nano-Scale TSV: Technology Boosters for Backside Power Delivery Network and 3D Heterogeneous Integration 

      Jourdain, Anne; Stucchi, Michele; Van Der Plas, Geert; Beyer, Gerald; Beyne, Eric (2022)
    • Buried power SRAM DTCO and system-level benchmarking in N3 

      Salahuddin, Shairfe Muhammad; Perumkunnil, Manu; Dentoni Litta, Eugenio; Gupta, Anshul; Weckx, Pieter; Ryckaert, Julien; Na, Myung Hee; Spessot, Alessio (2020)
    • Buried silicon-germanium pMOSFETs: experimental analysis in VLSI logic circuits under aggressive voltage scaling 

      Crupi, Felice; Alioto, Massimo; Franco, Jacopo; Magnone, Paolo; Kaczer, Ben; Groeseneken, Guido; Mitard, Jerome; Witters, Liesbeth; Hoffmann, Thomas Y. (2012)
    • Burmese python target reflectivity compared to natural Florida foliage background reflectivity 

      Driggers, Ronald; Furxhi, Orges; Vaca Castano, Gonzalo; Reumers, Veerle; Vazimali, Milad; Short, Robert; Agrawal, Prashant; Lambrechts, Andy; Charle, Wouter; Vunckx, Kathleen; Arvidson, Carl (2019)
    • Burst bit-error rate calculation for GPON systems 

      Meerschman, Bart; Yi, Yanchun; Ossieur, Peter; Verhulst, Dieter; Bauwelinck, Johan; Qiu, Xing Zhi; Vandewege, Jan (2003-11)
    • Burst Mode Bipolar Laser Driver for a Multipoint to Point Passive Optical Network at 155.52 Mbit/s 

      Coppoolse, René; Van Parys, Hans; Codenie, Jan; Vandewege, Jan (1995)
    • Burst mode data recovery for GPON access networks 

      Verhulst, Dieter; Yin, Xin; Bauwelinck, Johan; Ossieur, Peter (2004)