Recently added

Low-frequency noise assessment of the oxide trap density in thick-oxide input-output transistors for DRAM applications

Simoen, Eddy; Ritzenthaler, Romain; Cho, Moon Ju; Schram, Tom; Horiguchi, Naoto; Aoulaiche, Marc; Spessot, Alessio; Fazan, Pierre; Claeys, Cor (2016)

Generation-recombination noise in advanced CMOS devices

Simoen, Eddy; Oliveira, Alberto; Boudier, Dimitri; Mitard, Jerome; Witters, Liesbeth; Veloso, Anabela; Agopian, Paula; Martino, Joao; Carin, Regis; Langer, Robert; Collaert, Nadine; Thean, Aaron; Claeys, Cor (2016)

Comparison between Si/SiO2 mid-gap interface states and deep levels associated with silicon-oxygen superlattices in p-type silicon

Simoen, Eddy; Jayachandran, Suseendran; Delabie, Annelies; Caymax, Matty; Heyns, Marc (2016)

Deep levels in silicon-oxygen superlattices

Simoen, Eddy; Jayachandran, Suseendran; Delabie, Annelies; Caymax, Matty; Heyns, Marc (2016)

Impact of the gate material on the deep levels in a-Si:H/c-SI metal-insulator-semiconductor capacitors

Simoen, Eddy; Ferro, Valentina; O'Sullivan, Barry (2016)

Random telegraph noise: the key to single defect studies in nano-devices

Simoen, Eddy; Fang, Wen; Aoulaiche, Marc; Luo, Jun; Zhao, Chao; Claeys, Cor (2016)

On the assessment of electrically active defects in high-mobility materials and devices

Simoen, Eddy; Eneman, Geert; Oliveira, Alberto V.; Ni, Kai; Mitard, Jerome; Witters, Liesbeth; Agopian, Paula G D; Martino, Joao Antonio; Fleetwood, Dan; Schrimpf, Ronald; Reed, Robert; Collaert, Nadine; Thean, Aaron; Claeys, Cor (2016)

Study of electrically active defects in epitaxial layers on silicon

Simoen, Eddy; Dhayalan, Sathish Kumar; Jayachandran, Suseendran; Gupta, Somya; Gencarelli, Federica; Hikavyy, Andriy; Loo, Roger; Rosseel, Erik; Delabie, Annelies; Caymax, Matty; Langer, Robert; Barla, Kathy; Vrielinck, Henk; Lauwaert, Johan (2016)

Substitutional carbon loss in Si:C stressor layers probed by Deep-Level Transient Spectroscopy

Simoen, Eddy; Dhayalan, Sathish Kumar; Hikavyy, Andriy; Loo, Roger; Rosseel, Erik; Vrielinck, Hemk; Lauwaert, Johan (2016)

Low-frequency noise spectroscopy of bulk and border traps in nanoscale devices

Simoen, Eddy; Cretu, Bogdan; Fang, Wen; Aoulaiche, Marc; Routoure, Jean-Marc; Carin, Regis; Luo, Jun; Zhao, Chao; Claeys, Cor (2016)

Random telegraph signals in semiconductor devices

Simoen, Eddy; Claeys, Cor (2016-10)

Can we tell something about the barrier for capture from random telegraph signal time constants without changing the temperature?

Simoen, Eddy; Claeys, Cor (2016)

Comparative experimental analysis of time-dependent variability using a transistor test array

Simicic, Marko; Subirats, Alexandre; Weckx, Pieter; Kaczer, Ben; Franco, Jacopo; Roussel, Philippe; Linten, Dimitri; Thean, Aaron; Groeseneken, Guido; Gielen, Georges (2016)

Graphene devices for outperformed optical interconnets

Shiramin, Leili Abdollahi; Van Thourhout, Dries (2016)

Broadband double layer graphene switch integrated on silicon and silicon nitride waveguide

Shiramin, Leili A.; Van Thourhout, Dries (2016)

Introduction of Sn into GeSn based group-IV thin films and its impacts

Shimura, Yosuke; Ike, Shinichi; Gencarelli, Federica; Takeuchi, Wakana; Sakashita, Mitsuo; Kurosawa, Masashi; Loo, Roger; Nakatsuka, Osamu; Zaima, Shigeaki (2016-09)

Highly activated phosphorus in CVD Ge layers using in-situ doping at low temperature enabled by high order Ge precursors: toward Group-IV optical interconnections

Shimura, Yosuke; Srinivasan, Ashwyn; Van Thourhout, Dries; Van Deun, Rik; Pantouvaki, Marianna; Van Campenhout, Joris; Loo, Roger (2016)

Enhanced active P doping by using high order Ge precursors leading to intense photoluminescence

Shimura, Yosuke; Srinivasan, Ashwyn; Van Thourhout, Dries; Van Deun, Rik; Pantouvaki, Marianna; Van Campenhout, Joris; Loo, Roger (2016)

Design requirements for group-IV laser based on fully strained Ge1-xSnx embedded in partially relaxed Si1-y-zGeySnz buffer layers

Shimura, Yosuke; Srinivasan, Ashwyn; Loo, Roger (2016-03)

Architectural strategies in standard-cell design for the 7 nm and beyond technology node

Sherazi, Yasser; Chava, Bharani; Debacker, Peter; Garcia Bardon, Marie; Schuddinck, Pieter; Firouzi, Farshad; Raghavan, Praveen; Mercha, Abdelkarim; Verkest, Diederik; Ryckaert, Julien (2016)

imec Publications: Recent submissions

Low-frequency noise assessment of the oxide trap density in thick-oxide input-output transistors for DRAM applications ﻿

Generation-recombination noise in advanced CMOS devices ﻿

Comparison between Si/SiO2 mid-gap interface states and deep levels associated with silicon-oxygen superlattices in p-type silicon ﻿

Deep levels in silicon-oxygen superlattices ﻿

Impact of the gate material on the deep levels in a-Si:H/c-SI metal-insulator-semiconductor capacitors ﻿

Random telegraph noise: the key to single defect studies in nano-devices ﻿

On the assessment of electrically active defects in high-mobility materials and devices ﻿

Study of electrically active defects in epitaxial layers on silicon ﻿

Substitutional carbon loss in Si:C stressor layers probed by Deep-Level Transient Spectroscopy ﻿

Low-frequency noise spectroscopy of bulk and border traps in nanoscale devices ﻿

Random telegraph signals in semiconductor devices ﻿

Can we tell something about the barrier for capture from random telegraph signal time constants without changing the temperature? ﻿

Comparative experimental analysis of time-dependent variability using a transistor test array ﻿

Graphene devices for outperformed optical interconnets ﻿

Broadband double layer graphene switch integrated on silicon and silicon nitride waveguide ﻿

Introduction of Sn into GeSn based group-IV thin films and its impacts ﻿

Highly activated phosphorus in CVD Ge layers using in-situ doping at low temperature enabled by high order Ge precursors: toward Group-IV optical interconnections ﻿

Enhanced active P doping by using high order Ge precursors leading to intense photoluminescence ﻿

Design requirements for group-IV laser based on fully strained Ge1-xSnx embedded in partially relaxed Si1-y-zGeySnz buffer layers ﻿

Architectural strategies in standard-cell design for the 7 nm and beyond technology node ﻿