Compact thermally stable high voltage FinFET with 40 nm tox and lateral break-down >35 V for 3D NAND flash periphery application

Abstract

We propose for the first time a dedicated FinFET technology with specific optimization for tox >40 nm and lateral breakdown >35 V to replace the conventional planar high voltage transistors in the 3D NAND Flash periphery. We show significant current increase (>x2) and area saving per footprint, solving one of the key bottlenecks of future 3D NAND nodes. Fabrication of thermally stable prototypes is shown, with no significant impact on the overall fabrication complexity.