Browsing by Author "Albert, Johan"

15nm half-pitch patterning: EUV + SELF-aligned double patterning

15nm HP patterning with EUV and SADP: key contributors for improvement of LWR, LER, and CDU

15nm HP patterning with EUV lithography and SADP

A low-power HKMG CMOS platform compatible with DRAM node 2x and beyond

A new high-k/metal gate CMOS integration scheme (Diffusion and Gate Replacement) suppressing gate height asymmetry and compatible with high-thermal budget memory technologies

Cleaning and strip requirements for metal gate based CMOS integration

Diffusion and gate replacement: a new gate-first high-k/metal gate CMOS integration scheme suppressing gate height symmetry

Guidelines for reducing NBTI based on its correlation with effective work function studied by CV-BTI on high-k first MOS capacitors with slant etched SiO2

Implanted photoresist remover for advanced nodes including SiGe, Ge and high k-metals

Key contributors for improvement of line width roughness, line edge roughness, and critical dimension uniformity: 15 nm half-pitch patterning with extreme ultraviolet and self-aligned double patterning