Browsing by Author "Boelen, Pieter"
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Publication Cu resistivity scaling limits for 20 nm copper damascene lines
Proceedings paper2007, IEEE International Interconnect Technology Conference - IITC, 4/06/2007, p.49-51Publication Electrochemical nucleation and growth of copper on resistive substrates
Meeting abstract2007, 212th ECS Fall Meeting, 7/10/2007, p.1375Publication Electrochemical nucleation and growth of copper on resistive substrates
Proceedings paper2008, Electrodeposition of Nanoengineered Materials and Alloys 2, 7/10/2007, p.25-33Publication Full-field EUV and immersion lithography integration in 0.186μm² FinFET 6T-SRAM cell
Proceedings paper2008, Technical Digest International Electron Devices Meeting - IEDM, 15/12/2008, p.861-864Publication Integration of 50 nm half pitch single damascene copper trenches in BDII by means of double patterning 193 nm immersion lithography on metal hardmask
Oral presentation2007, Advanced Metallization Conference - AMCPublication Manufacturable processes for =32-nm-node CMOS enhancement by synchronous optimization of strain-engineered channel and external parasitic resistances
Journal article2008, IEEE Transactions on Electron Devices, (55) 5, p.1259-1264Publication O2 post deposition anneal of Al2O3 blocking dielectric for higher performance and reliability of TANOS flash memory
Proceedings paper2009, 39th European Solid-State Device Research Conference - ESSDERC, 14/09/2009, p.272-275Publication Poly- silicon etch with diluted ammonia: Application to replacement gate integration scheme
Oral presentation2008, 9th International Symposium on Ultra Clean Processing of Semiconductor Surfaces - UCPSSPublication Poly- silicon etch with diluted ammonia: application to replacement gate integration scheme
Journal article2009, Solid State Phenomena, 145-146, p.207-210Publication Scaling of the Cu(Al) seed layer thickness and its impact on the specific resistivity of sub-100 nm lines
Oral presentation2007, Advanced Metallization Conference: 17th Asian Session - ADMETA