Browsing by Author "Crabbe, Yvo"
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Publication 8Å Tinv gate-first dual channel technology achieving low-Vt high performance CMOS
Proceedings paper2010, IEEE Symposium on VLSI Technology, 15/06/2010, p.181-182Publication Development of a dielectric CMP process for replacement gate applications
Proceedings paper2010, International Conference on Planarization Technology - ICPT, 14/11/2010Publication Dual-channel technology with Cap-free single metal gate for high performance CMOS in gate-first and gate-last integration
Proceedings paper2011, IEEE International Electron Devices Meeting - IEDM, 5/12/2011, p.654-657Publication Gate-last vs. gate-first technology for aggressively scaled EOT Logic/RF CMOS
Proceedings paper2011, Symposium on VLSI Technology, 13/06/2011, p.34-35Publication High performance Si.45Ge.55 implant free quantum well FET featuring low temperature process, eSiGe stressor and transversal strain relaxation
Proceedings paper2011, IEEE International Electron Devices Meeting - IEDM, 5/12/2011, p.829-832Publication Process control & integration options of RMG Technology for aggressively scaled devices
Proceedings paper2012, Symposium on VLSI Technology - VLSIT, 12/06/2012, p.33-34