Browsing by Author "Hartwich, J."
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Publication Characterization of ultra-thin SOI transistors down to 20nm gate length regime with scanning spreading resistance microscopy (SSRM)
Proceedings paper2003, Proceedings 33rd European Solid-State Device Research Conference - ESSDERC, 16/09/2003Publication Fabrication and characterization of full diamond tips for scanning-spreading resistance microscopy
Journal article2004-06, Microelectronic Engineering, 73-74, p.910-915Publication High resolution 2D scanning spreading resistance microscopy (SSRM) of thin film SOI MOSFETs with ultra short effective channel length
;Hartwich, J. ;Alvarez, David ;Dreeskornfeld, L. ;Hoffman, F. ;Kretz, J. ;Landgraf, E.Luyken, R.J.Proceedings paper2003, IEEE International SOI Conference, 29/09/2003, p.35-36Publication High resolution scanning spreading resistance microscopy of fully depleted silicon-on-insulator devices and double-gate transistors
Meeting abstract2003, 7th International Workshop on Fabrication, Characterization and Modeling of Ultra-Shallow Doping Profiles in Semiconductors, 27/04/2003, p.184Publication High-resolution scanning spreading resistance microscopy of surrounding-gate transistors
;Alvarez, D. ;Schömann, S. ;Goebel, B. ;Manger, D. ;Schlösser, T. ;Slesazeck, S. ;Hartwich, J.Kretz, J.Journal article2004-01, Journal of Vacuum Science and Technology B, (22) 1, p.377-380Publication Scanning spreading resistance microscopy of fully depleted silicon-on-insulator devices
Journal article2003, Microelectronic Engineering, 67-68, p.945-950Publication Scanning spreading resistance microscopy of fully depleted SOI devices
;Alvarez, David ;Hartwich, J. ;Kretz, J.Fouchier, MarcOral presentation2002, Micro- and Nano-Engineering - MNEPublication Sub-5-nm-spatial resolution in scanning spreading resistance microscopy using full-diamond tips
Journal article2003, Applied Physics Letters, (82) 11, p.1724-1726Publication Two-dimensional carrier profiling in advanced devices with pico-meter resolution
Proceedings paper2004, Proceedings Ultimate Integration of Silicon (ULIS) Workshop, 11/03/2004, p.63-67