Browsing by Author "Khan, Seyab"
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Publication Bias temperature instability analysis in SRAM decoder
Proceedings paper2013, 18th IEEE European Test Symposium - ETS, 27/05/2013, p.1Publication Bias temperature instability analysis of FinFET based SRAM cells
Proceedings paper2014, Design, Automation and Test in Europe Conference - DATE, 24/03/2014, p.1-6Publication BTI analysis, monitoring and mitigation for nano scaled circuits
Khan, SeyabPHD thesis2013Publication BTI impact on logical gates in nano-scale CMOS technology
Proceedings paper2012, IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - DDECS, 18/04/2012Publication Comparison of reaction-diffusion and atomistic trap-based BTI models for logic gates
Journal article2014, IEEE Transactions on Device and Materials Reliability, (14) 1, p.182-193Publication Impact of partial resistive defects and bias temperature instability on SRAM decoder reliability
Publication Incorporating parameter variations in BTI impact on nano-scale logical gate analysis
Proceedings paper2012, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 3/10/2012Publication NBTI monitoring and design for reliability in nanoscale circuits
Proceedings paper2011, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems - DFT, 5/10/2011, p.68-76