Browsing by Author "Kim, Woojin"
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Publication A Co/Ni-based perpendicular magnetic tunnel junction (p-MTJ) stack with improved reference layer for BEOL compatibility
Meeting abstract2016, MMM Intermag, 11/01/2016Publication A novel test and analysis scheme to elucidate tail bit characteristics in STT-MRAM arrays
Proceedings paper2024, International Memory Workshop (IMW), MAY 12-15, 2024Publication BEOL compatible double-MTJ STT-MRAM for ultra-low write-currents
; ; ; ; ; Meeting abstract2020, Intermag 2020, 4/05/2020, p.GC-05Publication BEOL compatible top pinned magnetic tunnel junctions with a synthetic ferromagnetic pinning layer design
Meeting abstract2018, Joint European Magnetic Symposia. 9th JEMS Conference, 3/09/2018, p.SP4.2.06Publication BEOLC compatiblehigh tunnel magneto resistance perpendicula magnetic tunnel junctions using a sacrificial Mg layer as CoFeB free layer cap
Journal article2015, Applied Physics Letters, (106) 26, p.262407Publication CMP process steps for the fabrication of spin-transfer torque magnetic random access memory
Proceedings paper2016, 20th International Symposium on CMP at CAMP, 7/08/2016Publication Co/Ni based p-MTJ stack for sub-20nm high density stand alone and high performance embedded memory application
; ; ; ; Proceedings paper2014, International Electron Devices Meeting - IEDM, 15/12/2014, p.478-481Publication Cross-layer design and analysis of al ow power, high density STT-MRAM for embedded systems
Proceedings paper2017, 2017 IEEE International Symposium of Circuits and Systems - ISCAS, 28/05/2017, p.1-4Publication Cryogenic cooling post MgO promoting the free layer coercivity and TMR in perpendicular bottom pinned Co/Ni STT-MRAM device stacks
Meeting abstract2016, 61st Annual Conference on Magnetism and Magnetic Materials, 31/10/2016Publication Demonstration of a Free-layer Developed With Atomistic Simulations Enabling BEOL Compatible VCMA-MRAM with a Coefficient >= 100fJ/Vm
Proceedings paper2021, IEEE International Electron Devices Meeting (IEDM), DEC 11-16, 2021Publication Design exploration of IGZO diode based VCMA array design for Storage Class Memory Applications
Proceedings paper2022, 52nd IEEE European Solid-State Device Research Conference (ESSDERC), SEP 19-22, 2022, p.241-244Publication Design-for-Test for Intermittent Faults in STT-MRAMs
Proceedings paper2024, IEEE European Test Symposium (ETS), MAY 20-24, 2024Publication Deterministic and field-free voltage-controlled MRAM for high performance and low power applications
Proceedings paper2020, IEEE Symposium on VLSI Technology and Circuits, JUN 15-19, 2020Publication Device Aware Diagnosis for Unique Defects in STT-MRAMs
Proceedings paper2023, 32nd IEEE Asian Test Symposium (ATS), OCT 14-17, 2023, p.71-76Publication Diffusion control in top-pinned STT-MRAM devices
Meeting abstract2019, 2019 JOINT MMM-INTERMAG Conference, 14/01/2019, p.FF-10Publication Distinctive behavior of perpendicular magnetic tunnel junctions with size comparable to the electrical switching nucleation
Oral presentation2017, Intermag 2017Publication Double torque perpendicular STT-MRAM devices for low power IoT and edge computing
Oral presentation2021, Intermag 2021Publication Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution
; ; ; ; Publication Enablement of STT-MRAM as last level cache for the high performance computing domain at the 5nm node
; ; ; Proceedings paper2018, IEEE International Electron Devices Meeting - IEDM, 1/12/2018, p.420-423Publication Enabling BEOL compatibility in top-pinned STT-MRAM
Meeting abstract2019, York-Tohoku-Kaiserslautern Research Symposium on "New-Concept Spintronics Devices", 12/06/2019, p.37