Browsing by Author "Papameletis, Christos"
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Publication A 3D-DfT demonstrator
Proceedings paper2014-05, IEEE North-Atlantic Test Workshop, 14/05/2014Publication A 3D-DfT demonstrator
Proceedings paper2014-06, Design Automation Conference - DAC, 1/06/2014Publication A DfT architecture and tool flow for 3D-SICs with test data compression, embedded cores, and multiple towers
Journal article2015, IEEE Design & Test, (32) 4, p.40-48Publication At-speed delay testing of inter-die connections of 2.5D- and 3D-SICs
Publication At-speed delay testing of inter-die connections of 2.5D- and 3D-SICs
Publication At-Speed delay testing of inter-die connections of 2.5D- and 3D-SICs
Publication At-speed inter-die interconnect test in 2.5D- and 3D-SICs
Publication At-speed testing of inter-die connections of 3D-SICs in the presence of shore logic
Publication Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers
Proceedings paper2013-05, IEEE European Test Symposium - ETS, 27/05/2013, p.15-20Publication Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers
Oral presentation2013, Cadence CDNLive! EMEAPublication Design, test generation, processing, and pre- and post-bond measurement results of a 3D-DfT demonstrator chip stack
Proceedings paper2014-05, CDN Live! EMEA, 19/05/2014Publication Design, test generation, processing, and pre- and post-bond measurement results of a 3D-DfT demonstrator chip stack
Oral presentation2014, Design, Automation, and Test in Europe - DATE': Friday Workshop on 3D IntegrationPublication Embedded toggle generator to control the switching activity
Proceedings paper2017-09, IEEE International Symposium on Power and Timing Modeling, Optimization, and Simulation - PATMOS, 25/09/2017, p.1-8Publication Embedded toggle generator to provide realistic test conditions during test of digital 2D-SoCs and 3D-SICs
Proceedings paper2018-05, CDN Live EMEA 2018, 7/05/2018Publication Extension of a 3D-DfT architecture for embedded cores and multiple towers
Proceedings paper2012, IEEE International Workshop on Testing Three-Dimensional Stacked ICs - 3D-TEST, 8/11/2012Publication Imec's 3D-DfT architecture: basics, extensions, and demonstrator results
Proceedings paper2014-06, Workshop on Design for 3D Silicon Integration - D43D, 23/06/2014Publication On-chip toggle generators to provide realistic conditions during test of digital 2D-SoCs and 3D-SICs
Proceedings paper2018-11, IEEE International Test Conference - ITC'18, 28/10/2018, p.1-9Publication Vesuvius-3D: A 3D-DfT demonstrator
Proceedings paper2014-10, IEEE International Test Conference - ITC, 21/10/2014, p.1-10