Browsing by Author "Rooyackers, Rita"
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Publication 25% drive current improvement for p-type Multiple Gate FET (MuGFET) devices by the introduction of recessed Si0.8Ge0.2 in the source and drain regions
Proceedings paper2005, Symposium on VLSI Technology. Digest of Technical Papers, 14/06/2005, p.194-195Publication 90nm RF CMOS technology for low-power 900MHz applications
Proceedings paper2004, Proceedings of the 34th European Solid-State Device Research Conference - ESSDERC, 21/09/2004, p.329-332Publication A 0.314mm2 6T-SRAM cell built with tall triple-gate devices for 45nm node applications using 0.75NA 193nm lithography
Proceedings paper2004-12, Technical Digest International Electron Devices Meeting - IEDM, 13/12/2004, p.269-272Publication A 10-bit current-steering FinFET D/A converter
Proceedings paper2008, IEEE International SOI Conference Proceedings, 6/10/2008, p.95-96Publication A 35nm diameter vertical silicon nanowire short-gate tunnelFET
Proceedings paper2009, Nanotechnology Workshop, 13/06/2009Publication A functional 41-stage ring oscillator using scaled FinFET devices with 25nm gate lengths and 10nm Fin widths applicable for the 45nm CMOS node
Journal article2004-08, IEEE Electron Device Letters, (25) 8, p.568-570Publication A high performance 0.18µm elevated source/drain technology with improved manufacturability
Proceedings paper1999, ESSDERC'99 - Proceedings of the 29th European Solid-State Device Research Conference, 13/09/1999, p.636-639Publication A low-power multi-gate FET CMOS technology with 13.9ps inverter delay, large-scale integrated high performance digital circuits and SRAM
Publication A new complementary hetero-junction vertical tunnel-FET integration scheme
Proceedings paper2013, International Electron Devices Meeting - IEDM, 9/12/2013, p.92-95Publication A new direction for III-V FETs for mobile CPU operation uncluding burst-mode: In0.35Ga0.65As channel
Publication A new dummy-free shallow trench isolation concept for mixed-signal applications
Publication A new dummy-free shallow trench isolation concept for mixed-signal applications
Publication A novel approach for the elimination of the pattern density dependence of CMP for shallow trench isolation
Proceedings paper1998, Proceedings of the 3rd International Chemical-Mechanical-Planarization for ULSI Multilevel Interconnection Conference - CMP-MIC, p.313-318Publication A systematic study of trade-offs in engineering a locally strained pMOSFET
Proceedings paper2004, Technical Digest International Electron Devices Meeting - IEDM, 13/12/2004, p.1055-1058Publication Accurate fin patterning in emerging devices for 32nm and beyond
Journal article2007-07, Future Fab, 23, p.68-70Publication Advanced FinFET devices for sub-32nm technology nodes: characteristics and integration challenges
Proceedings paper2009, Silicon-on-Insulator Technology and Devices 14, 24/05/2009, p.45-54Publication Advanced FinFET devices for sub-32nm technology nodes: characteristics and integration challenges
Meeting abstract2009, 215th Electrochemical Society Spring Meeting, 25/05/2009, p.935Publication Advanced semiconductor devices for future CMOS technologies
Proceedings paper2015, Advanced CMOS-Compatible Semiconductor Devices 17, 25/05/2015, p.49-60Publication AFM-based tomography for probing the electrical properties in confined volumes at the nanometer scale
Meeting abstract2013, MRS Spring Meeting Symposium Y: Advances in Scanning Probe Microscopy for Imaging Functionality on the Nanoscale, 1/04/2013, p.Y6.01Publication An optimized poly-buffered LOCOS process for a 0.35 µm CMOS technology
Proceedings paper1994, 24th European Solid State Device Research Conference - ESSDERC, 11/09/1994, p.199-202