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Browsing by Author "Srividya, Vidya"

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    Correlation between the Vth-adjustment of nMOSFETs with HfSiO gate oxide and the energy profile of high-k bulk trap density

    Sahhaf, Sahar  
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    Degraeve, Robin  
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    Srividya, Vidya
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    Kaczer, Ben  
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    Gealy, Dan
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    Horiguchi, Naoto  
    Journal article
    2010, IEEE Electron Device Letters, (31) 4, p.272-274
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    Impact of DRAM process flow on the performance of periphery devices for next generation mobile applications

    Spessot, Alessio  
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    Caillat, Christian
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    Srividya, Vidya
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    Fazan, Pierre  
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    Schram, Tom  
    Proceedings paper
    2011, 2nd International Workshop on Simulation and Modeling of Memory - IWSM2, 6/10/2011
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    Interpretation of PBTI/ TDDB predicted lifetime based on trap characterization by TSCIS in Vth-adjusted transistors

    Sahhaf, Sahar  
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    Degraeve, Robin  
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    Srividya, Vidya
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    Cho, Moon Ju
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    Kauerauf, Thomas
    Proceedings paper
    2010, 48th Annual IEEE International Reliability Physics Symposium- IRPS, 2/05/2010, p.1078-1081
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    Ion-implantation-based low-cost Hk/MG process for CMOS low-power application

    Ortolland, Claude
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    Sahhaf, Sahar  
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    Srividya, Vidya
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    Degraeve, Robin  
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    Saino, Kanta
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    Kim, Chul-Sung
    Proceedings paper
    2010, IEEE Symposium on VLSI Technology, 15/06/2010, p.185-186
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    Low-power DRAM-compatible replacement gate high-k/metal gate stacks

    Ritzenthaler, Romain  
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    Schram, Tom  
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    Bury, Erik  
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    Spessot, Alessio  
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    Caillat, Christian
    Journal article
    2013, Solid-State Electronics, 84, p.22-27
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    Low-power DRAM-compatible replacement gate high-k/metal gate stacks

    Ritzenthaler, Romain  
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    Schram, Tom  
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    Bury, Erik  
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    Mitard, Jerome  
    ;
    Ragnarsson, Lars-Ake  
    Proceedings paper
    2012, 42nd European Solid-State Device Research Conference - ESSDERC, 17/09/2012, p.242-245

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