Browsing by author "Xiang, Yang"
Now showing items 1-20 of 21
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A BSIM-Based Predictive Hot-Carrier Aging Compact Model
Xiang, Yang; Tyaginov, Stanislav; Vandemaele, Michiel; Wu, Zhicheng; Franco, Jacopo; Bury, Erik; Truijen, Brecht; Parvais, Bertrand; Linten, Dimitri; Kaczer, Ben (2021) -
Built-in sheet charge as an alternative to dopant pockets in tunnel field-effect transistors
Verreck, Devin; Verhulst, Anne; Xiang, Yang; Yakimets, Dmitry; El Kazzi, Salim; Parvais, Bertrand; Groeseneken, Guido; Collaert, Nadine; Mocuta, Anda (2018) -
CFET SRAM DTCO, Interconnect Guideline, and Benchmark for CMOS Scaling
Liu, Hsiao-Hsuan; Salahuddin, Shairfe Muhammad; Chan, Boon Teik; Schuddinck, Pieter; Xiang, Yang; Hellings, Geert; Weckx, Pieter; Ryckaert, Julien; Catthoor, Francky (2023) -
CFET SRAM With Double-Sided Interconnect Design and DTCO Benchmark
Liu, Hsiao-Hsuan; Schuddinck, Pieter; Pei, Zhenlin; Verschueren, Lynn; Mertens, Hans; Salahuddin, Shairfe Muhammad; Hiblot, Gaspard; Xiang, Yang; Chan, Boon Teik; Subramanian, Sujith; Weckx, Pieter; Hellings, Geert; Garcia Bardon, Marie; Ryckaert, Julien; Pan, Chenyun; Catthoor, Francky (2023) -
Compact Modeling and Design Exploration of Non-Destructive Read-Out 1T1C FeRAM
Xiang, Yang; Mukherjee, Shankha; Hellings, Geert; Oh, Hyungrock; Garcia Bardon, Marie; Van Houdt, Jan (2024) -
Compact Modeling of Multidomain Ferroelectric FETs: Charge Trapping, Channel Percolation, and Nucleation-Growth Domain Dynamics
Xiang, Yang; Garcia Bardon, Marie; Kaczer, Ben; Alam, Md Nur Kutubul; Ragnarsson, Lars-Ake; Kaczmarek, Kuba; Parvais, Bertrand; Groeseneken, Guido; Van Houdt, Jan (2021) -
Design enablement of CFET devices for sub-2nm CMOS nodes
Zografos, Odysseas; Chehab, Bilal; Schuddinck, Pieter; Mirabelli, Gioele; Kakarla, Naveen; Xiang, Yang; Weckx, Pieter; Ryckaert, Julien (2022-05-19) -
Design Space Exploration of FeRAM Bit Cell for DRAM Application
Oh, Hyungrock; Xiang, Yang; Garcia Redondo, Fernando; Gupta, Mohit Kumar; Perumkunnil, Manu; Garcia Bardon, Marie; Dhiman, Amit; Nanjunde Gowda, Sathisha; Walke, Amey; Fantini, Andrea; Yasin, Farrukh; Kar, Gouri Sankar; Hellings, Geert; Dehaene, Wim (2024) -
Evaluation of Nanosheet and Forksheet Width Modulation for Digital IC Design in the Sub-3 nm Era
Sisto, Giuliano; Zografos, Odysseas; Chehab, Bilal; Kakarla, Naveen; Xiang, Yang; Milojevic, Dragomir; Weckx, Pieter; Hellings, Geert; Ryckaert, Julien (2022) -
High-Density Standard Cell Libraries with Backside Power Options in A14 Nanosheet Node
Kükner, Halil; Mirabelli, Gioele; Yang, Sheng; Zhou, Yun; Makarov, Alexander; Xiang, Yang; Boemmels, Juergen; Veloso, Anabela; Zografos, Odysseas; Weckx, Pieter; Ryckaert, Julien; Hellings, Geert (2024) -
Implication of Channel Percolation in Ferroelectric FETs for Threshold Voltage Shift Modeling
Xiang, Yang; Garcia Bardon, Marie; Kaczer, Ben; Alam, Md Nur Kutubul; Ragnarsson, Lars-Ake; Groeseneken, Guido; Van Houdt, Jan (2020) -
Physical insights on steep slope FEFETs including nucleation-propagation and charge trapping
Xiang, Yang; Garcia Bardon, Marie; Alam, Md Nur Kutubul; Thesberg, Mischa; Kaczer, Ben; Roussel, Philippe; Popovici, Mihaela Ioana; Ragnarsson, Lars-Ake; Truijen, Brecht; Verhulst, Anne; Parvais, Bertrand; Horiguchi, Naoto; Groeseneken, Guido; Van Houdt, Jan (2019) -
PPAC of sheet-based CFET configurations for 4 track design with 16nm metal pitch
Roda Neve, César; Schuddinck, Pieter; Bufler, Fabian; Xiang, Yang; Farokhnejad, Anita; Mirabelli, Gioele; Vandooren, Anne; Chehab, Bilal; Gupta, Anshul; Hellings, Geert; Ryckaert, Julien (2022-06) -
Process-induced power-performance variability in sub-5nm III-V tunnel FETs
Xiang, Yang; Verhulst, Anne; Yakimets, Dmitry; Parvais, Bertrand; Mocuta, Anda; Groeseneken, Guido (2019-04) -
Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies
Rzepa, G.; Karner, M.; Baumgartner, O.; Strof, G.; Schanovsky, F.; Mitterbauer, F.; Kernstock, C.; Karner, H. W.; Stanojevic, Z.; Weckx, Pieter; Hellings, Geert; Claes, Dieter; Wu, Zhicheng; Xiang, Yang; Chiarella, Thomas; Parvais, Bertrand; Mitard, Jerome; Franco, Jacopo; Kaczer, Ben; Linten, Dimitri (2021) -
STT-MRAM Stochastic and Defects-aware DTCO for Last Level Cache at Advanced Process Nodes
Garcia-Redondo, F.; Rao, Siddharth; Gupta, Mohit; Perumkunnil, Manu; Xiang, Yang; Abdi, Dawit; Van Beek, Simon; Couet, Sebastien; Garcia Bardon, Marie (2023) -
The properties, effect and extraction of localized defect profiles from degraded FET characteristics
Vandemaele, Michiel; Kaczer, Ben; Tyaginov, Stanislav; Franco, Jacopo; Degraeve, Robin; Vaisman Chasin, Adrian; Wu, Zhicheng; Bury, Erik; Xiang, Yang; Mertens, Hans; Groeseneken, Guido (2021) -
Thermally stable, packaged aware LV HKMG platforms benchmark to enable low power I/O for next 3D NAND generations
Spessot, Alessio; Salahuddin, Shairfe Muhammad; Escobar Gavilanez, Ricardo; Ritzenthaler, Romain; Xiang, Yang; Budhwani, Rahul Kumar; Dentoni Litta, Eugenio; Capogreco, Elena; Bastos, Joao; Chen, Yangyin; Horiguchi, Naoto (2022) -
Trap-aware compact modeling and power-performance assessment of III-V tunnel FET
Xiang, Yang; Yakimets, Dmitry; Sant, Saurabh; Memisevic, Elvedin; Garcia Bardon, Marie; Verhulst, Anne; Parvais, Bertrand; Schenk, Andreas; Wernersson, Lars-Erik; Groeseneken, Guido (2018-10) -
Understanding the memory window in 1T-FeFET memories: a depolarization field perspective
Kaczmarek, Kuba; Garcia Bardon, Marie; Xiang, Yang; Breuil, Laurent; Ronchi, Nicolo; Parvais, Bertrand; Groeseneken, Guido; Van Houdt, Jan (2021)