Browsing by author "Mertens, Hans"
Now showing items 61-80 of 121
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Junctionless versus inversion-mode lateral semiconductor nanowire transistors
Veloso, Anabela; Matagne, Philippe; Simoen, Eddy; Kaczer, Ben; Eneman, Geert; Mertens, Hans; Yakimets, Dmitry; Parvais, Bertrand; Mocuta, Dan (2018) -
Lateral NWFET optimization for beyond 7nm nodes
Yakimets, Dmitry; Jang, Doyoung; Raghavan, Praveen; Eneman, Geert; Mertens, Hans; Schuddinck, Pieter; Mallik, Arindam; Garcia Bardon, Marie; Collaert, Nadine; Mercha, Abdelkarim; Verkest, Diederik; Thean, Aaron; De Meyer, Kristin (2015) -
Low frequency noise analysis on Si/SiGe superlattice I/O n-channel FinFETs
Boudier, Dimitri; Cretu, Bogdan; Simoen, Eddy; Hellings, Geert; Schram, Tom; Mertens, Hans; Linten, Dimitri (2019) -
Low frequency noise analysis on Si/SiGe superlattice I/O n-channel FinFETs
Boudier, Dimitri; Cretu, Bogdan; Simoen, Eddy; Hellings, Geert; Schram, Tom; Mertens, Hans; Linten, Dimitri (2020) -
Low frequency noise characterization of GeOx passivated Germanium MOSFETs
Fang, Wen; Simoen, Eddy; Arimura, Hiroaki; Mitard, Jerome; Sioncke, Sonja; Mertens, Hans; Mocuta, Anda; Collaert, Nadine; Luo, Jun; Zhao, Chao; Thean, Aaron; Claeys, Cor (2015) -
Low frequency noise performance of horizontal, stacked and vertical silicon nanowire MOSFETs
Simoen, Eddy; de Oliveira, Alberto Vinicius; Der Agopian, Paula Ghedini; Ritzenthaler, Romain; Mertens, Hans; Horiguchi, Naoto; Martino, Joao Antonio; Claeys, Cor; Veloso, Anabela (2021) -
Low temperature SiGe steam oxide – aqueous HF and NH3/NF3 remote plasma etching and its implementation as Si GAA inner spacer
Wostyn, Kurt; Kenis, Karine; Mertens, Hans; Vaisman Chasin, Adrian; Hikavyy, Andriy; Holsteyns, Frank; Horiguchi, Naoto (2018) -
Low temperature source / drain epitaxy and functional silicides: essentials for ultimate contact scaling
Porret, Clément; Everaert, Jean-Luc; Schaekers, Marc; Ragnarsson, Lars-Ake; Hikavyy, Andriy; Rosseel, Erik; Rengo, Gianluca; Loo, Roger; Khazaka, R.; Givens, M.; Piao, Xiaoyu; Mertens, Sofie; Heylen, Nancy; Mertens, Hans; Toledo de Carvalho Cavalcante, Camila; Sterckx, Gunther; Brus, Stephan; Nalin Mehta, Ankit; Korytov, Maxim; Batuk, Dmitry; Favia, Paola; Langer, Robert; Pourtois, Geoffrey; Swerts, Johan; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022) -
Low-temperature pre-epitaxy surface cleaning of Si and SiGe
Profijt, Harald; Suhard, Samuel; Rosseel, Erik; Tolle, John; Mertens, Hans; Dhayalan, Sathish Kumar; Hikavyy, Andriy; Weeks, Doran; Holsteyns, Frank; Loo, Roger; Mehta, Sandeep; Maes, Jan (2015-05) -
Middle-of-line plasma dry etch challenges for Buried Power Rail integration
Radisic, Dunja; Veloso, Anabela; Gupta, Anshul; Hosseini, Maryam; Wang, Shiwei; Mertens, Hans; Chan, BT; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Lazzarino, Frederic; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022) -
Model-free measurement of lateral recess in gate-all-around transistors with micro hard-X-ray fluorescence
Bogdanowicz, Janusz; Oniki, Yusuke; Kenis, Karine; Puttarame Gowda, Pallavi; Mertens, Hans; Shamieh, Basel; Leon, Yonatan; Wormington, Matthew; Van der Meer, Juliette; Charley, Anne-Laure (2023) -
Nanosheet FETs and their Potential for Enabling Continued Moore's Law Scaling
Veloso, Anabela; Eneman, Geert; De Keersgieter, An; Jang, Doyoung; Mertens, Hans; Matagne, Philippe; Dentoni Litta, Eugenio; Ryckaert, Julien; Horiguchi, Naoto (2021) -
NBTI in replacement metal gate SiGe core finFETs: impact of Ge concentration, fin width, fin rotation and interface passivation by high pressure anneal
Franco, Jacopo; Kaczer, Ben; Vaisman Chasin, Adrian; Mertens, Hans; Ragnarsson, Lars-Ake; Ritzenthaler, Romain; Mukhopadhyay, Subhadeep; Arimura, Hiroaki; Roussel, Philippe; Bury, Erik; Horiguchi, Naoto; Linten, Dimitri; Groeseneken, Guido; Thean, Aaron (2016) -
NBTI in Si0.55Ge0.45 cladding p-FinFETs: porting the superior reliability from planar to 3D architectures
Franco, Jacopo; Kaczer, Ben; Roussel, Philippe; Bury, Erik; Mertens, Hans; Ritzenthaler, Romain; Grasser, T.; Horiguchi, Naoto; Thean, Aaron; Groeseneken, Guido (2015) -
Patterning challenges in advanced device architectures: FinFETs to nanowire
Horiguchi, Naoto; Milenin, Alexey; Tao, Zheng; Hody, Hubert; Altamirano Sanchez, Efrain; Veloso, Anabela; Witters, Liesbeth; Waldron, Niamh; Ragnarsson, Lars-Ake; Kim, Min-Soo; Kikuchi, Yoshiaki; Mertens, Hans; Raghavan, Praveen; Piumi, Daniele; Collaert, Nadine; Barla, Kathy; Thean, Aaron (2016) -
Performance and reliability of high-mobility Si0.55Ge0.45 p-channel FinFETs based on epitaxial cladding of Si fins
Mertens, Hans; Ritzenthaler, Romain; Hikavyy, Andriy; Franco, Jacopo; Lee, Jae Woo; Brunco, David; Eneman, Geert; Witters, Liesbeth; Mitard, Jerome; Kubicek, Stefan; Devriendt, Katia; Tsvetanova, Diana; Milenin, Alexey; Vrancken, Christa; Geypen, Jef; Bender, Hugo; Groeseneken, Guido; Vandervorst, Wilfried; Barla, Kathy; Collaert, Nadine; Horiguchi, Naoto; Thean, Aaron (2014) -
Performance comparison of N-Type Si nanowires, nanosheets and FinFETs by MC device simulation
Bufler, Fabian; Ritzenthaler, Romain; Mertens, Hans; Eneman, Geert; Mocuta, Anda; Horiguchi, Naoto (2018-11) -
Power-performance trade-offs for lateral nanosheets on ultra-scaled standard cells
Garcia Bardon, Marie; Sherazi, Yasser; Jang, Doyoung; Yakimets, Dmitry; Schuddinck, Pieter; Baert, Rogier; Mertens, Hans; Mattii, Luca; Parvais, Bertrand; Mocuta, Anda; Verkest, Diederik (2018) -
PPAC scaling enablement for 5nm Mobile SoC technology
Baradoglu, Mustafa; Xu, Jeff; Zhu, John; Yang, Da; Bao, Jerry; Song, Seung-Chul; Feng, Peijie; Ritzenthaler, Romain; Mertens, Hans; Eneman, Geert; Horiguchi, Naoto; Smith, Jeffrey; Datta, Suman; Kohen, David; Chan, Po-Wen; Chen, Keagan; Chidambaram, PR. Chidi (2017) -
Processing technologies for advanced Ge devices
Loo, Roger; Hikavyy, Andriy; Witters, Liesbeth; Schulze, Andreas; Arimura, Hiroaki; Cott, Daire; Porret, Clément; Mertens, Hans; Ryan, Paul; Wall, John; Matney, Kevin; Wormington, Matthew; Horiguchi, Naoto; Collaert, Nadine; Thean, Aaron (2016-10)