Browsing by author "Naem, Abdalla"
Now showing items 1-15 of 15
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0.13µm CMOS technology with optimized poly-Si / NO-oxide gate stack
Kubicek, Stefan; Jansen, Philippe; Badenes, Gonçal; Schaekers, Marc; Kol'dyaev, Victor; Deferm, Ludo; De Meyer, Kristin; Kerr, Daniel; Naem, Abdalla (1999) -
Analysis of leakage currents and impact on off-state power consumption for CMOS technology in the 100-nm regime
Henson, Kirklen; Yang, N.; Kubicek, Stefan; Vogel, E. M.; Wortman, J.; De Meyer, Kristin; Naem, Abdalla (2000) -
Closed form inductance calculation for integrated spiral inductor compact modeling
Jenei, Snezana; Nauwelaers, Bart; Decoutere, Stefaan; Naem, Abdalla (2000) -
Effect of implantation oxide on the silicidation of narrow diffused and poly-lines
Naem, Abdalla; Lauwers, A.; de Potter de ten Broeck, Muriel; Maex, Karen (1997) -
Effect of implantation oxide on the Ti- and Co-silicidation of narrow diffusion and poly-lines
Lauwers, Anne; Naem, Abdalla; de Potter de ten Broeck, Muriel; Maex, Karen (1998) -
Gate stack optimisation for advanced CMOS process
Kubicek, Stefan; Vandenberghe, Geert; Schaekers, Marc; Kol'dyaev, Victor; Jansen, Philippe; Badenes, Gonçal; Deferm, Ludo; De Meyer, Kristin; Kerr, Daniel; Naem, Abdalla (1999) -
High density 3-D stack structure for SIP solutions
Stoukatch, Serguei; Ho, Meng; Vaesen, Kristof; Webers, Tomas; Carchon, Geert; De Raedt, Walter; Beyne, Eric; De Baets, Johan; Naem, Abdalla; Poddar, Anindya (2003) -
Influence of device geometry on ESD performance for deep submicron CMOS technology
Bock, Karlheinz; Keppens, Bart; De Heyn, Vincent; Groeseneken, Guido; Ching, L. Y.; Naem, Abdalla (1999) -
Influence of gate length on ESD performance for deep submicron CMOS technology
Bock, Karlheinz; Keppens, Bart; De Heyn, Vincent; Groeseneken, Guido; Ching, L. Y.; Naem, Abdalla (1999) -
Influence of gate length on ESD-performance for deep submicron CMOS technology
Bock, Karlheinz; Keppens, Bart; De Heyn, Vincent; Groeseneken, Guido; Ching, L. Y.; Naem, Abdalla (2001) -
Integrated passives for a DECT VCO
Vaesen, Kristof; Pieters, Philip; Carchon, Geert; De Raedt, Walter; Beyne, Eric; Naem, Abdalla; Kohlmann, R. (2000) -
Integrated passives for a DECT VCO
Vaesen, Kristof; Pieters, Philip; Carchon, Geert; De Raedt, Walter; Beyne, Eric; Naem, Abdalla; Kohlmann, R. (2000) -
Investigation of instrinsic transistor performance of advanced CMOS devices with 2.5 nm NO gate oxides
Kubicek, Stefan; Henson, W. K.; De Keersgieter, An; Badenes, Gonçal; Jansen, Philippe; van Meer, Hans; Kerr, Daniel; Naem, Abdalla; Deferm, Ludo; De Meyer, Kristin (1999) -
Realisation of a DECT VCO circuit with MCM-D technology
Vaesen, Kristof; Brebels, Steven; De Raedt, Walter; Beyne, Eric; Naem, Abdalla; Kohlmann, R. (1999) -
Temperature acceleration of oxide breakdown and its impact on ultra-thin gate oxide reliability
Degraeve, Robin; Pangon, Nadège; Kaczer, Ben; Nigam, Tanya; Groeseneken, Guido; Naem, Abdalla (1999)