Browsing by author "Raghavan, Praveen"
Now showing items 21-40 of 222
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An highly-efficient programmable MIMO detector architecture for advanced wireless communication
Fasthuber, Robert; Raghavan, Praveen; Catthoor, Francky (2010) -
An integrated reconfigurable engine for multi-purpose sensing up to 6 GHz
Pollin, Sofie; Hollevoet, Lieven; Van Wesemael, Peter; Desmet, Mattias; Bourdoux, André; Lopez, E.; Naessens, Frederik; Raghavan, Praveen; Derudder, Veerle; Dupont, Steven; Dejonghe, Antoine (2011-04) -
An unified ASIP for multi-standard turbo and LDPC decoding
Raghavan, Praveen; Naessens, Frederik; Derudder, Veerle; Weijers, Jan-Willem; Dupont, Steven; Van der Perre, Liesbet (2009) -
Architectural strategies in standard-cell design for the 7 nm and beyond technology node
Sherazi, Yasser; Chava, Bharani; Debacker, Peter; Garcia Bardon, Marie; Schuddinck, Pieter; Firouzi, Farshad; Raghavan, Praveen; Mercha, Abdelkarim; Verkest, Diederik; Ryckaert, Julien (2016) -
Architecture exploration for digital decimation filters
Novo Bruna, David; Fasthuber, Robert; Raghavan, Praveen; Bourdoux, André; Catthoor, Francky; Van der Perre, Liesbet (2009-11) -
Architectures and circuits for software defined radios: scaling and scalability for low cost and low energy
Van der Perre, Liesbet; Bougard, Bruno; Craninckx, Jan; Dehaene, Wim; Hollevoet, Lieven; Jayapala, Murali; Marchal, Pol; Miranda Corbalan, Miguel; Raghavan, Praveen; Schuster, Thomas; Wambacq, Piet; Catthoor, Francky; Vanbekbergen, Peter (2007-02) -
Architectures for cognitive radio testbeds and demonstrators – an overview
Gustafsson, Oscar; Raghavan, Praveen (2010) -
Area and routing efficiency of SWD circuits compared to advanced CMOS
Zografos, Odysseas; Raghavan, Praveen; Sherazi, Yasser; Vaysset, Adrien; Ciubotaru, Florin; Soree, Bart; Lauwereins, Rudy; Radu, Iuliana; Thean, Aaron (2015) -
Automated architecture exploration for low energy reconfigurable AGU
Taniguchi, Itetsu; Jayapala, Murali; Raghavan, Praveen; Catthoor, Francky; Sakanushi, Keisji; Takeuchi, Yoshinori; Imai, Masaharu (2011) -
Benchmarking of monolithic 3D integrated MX2 FETs with Si FinFETs
Agarwal Kumar, Tarun; Szabo, Aron; Garcia Bardon, Marie; Soree, Bart; Radu, Iuliana; Raghavan, Praveen; Luisier, Mathieu; Dehaene, Wim; Heyns, Marc (2017) -
Benchmarking of MoS2 FETs with multigate Si-FET options for 5 nm and beyond
Agarwal Kumar, Tarun; Yakimets, Dmitry; Raghavan, Praveen; Radu, Iuliana; Thean, Aaron; Heyns, Marc; Dehaene, Wim (2015) -
Bias temperature instability analysis in SRAM decoder
Khan, Seyab; Hamdioui, Said; Kukner, Halil; Raghavan, Praveen; Catthoor, Francky (2013) -
Bias temperature instability analysis of FinFET based SRAM cells
Khan, Seyab; Agbo, Innocent; Hamdioui, Said; Kukner, Halil; Kaczer, Ben; Raghavan, Praveen; Catthoor, Francky (2014) -
Bilayer graphene tunneling-FET for sub-0.2 V digital CMOS logic applications
Agarwal Kumar, Tarun; Nourbakhsh, Amirhasan; Raghavan, Praveen; Radu, Iuliana; Verhelst, Marian; De Gendt, Stefan; Heyns, Marc; Thean, Aaron (2014) -
BTI analysis for high performance and low power SRAM sense amplifier designs
Agbo, Innocent; Taouil, Mottaqiallah; Hamdioui, Said; Weckx, Pieter; Raghavan, Praveen; Catthoor, Francky (2015) -
BTI impact on logical gates in nano-scale CMOS technology
Kukner, Halil; Khan, Seyab; Hamdioui, Said; Raghavan, Praveen; Catthoor, Francky (2012) -
BTI reliability from planar to FinFET nodes: Will the next node be more or less reliable?
Kukner, Halil; Weckx, Pieter; Raghavan, Praveen; Kaczer, Ben; Jang, Doyoung; Catthoor, Francky; Van der Perre, Liesbet; Lauwereins, Rudy; Groeseneken, Guido (2014) -
Capturing true workload dependency of BTI-induced degradation in CPU components
Stamoulis, Dimitrios; Corbetta, Simone; Rodopoulos, Dimitrios; Weckx, Pieter; Debacker, Peter; Meyer H., Brett; Kaczer, Ben; Raghavan, Praveen; Soudris, Dimitrios; Catthoor, Francky; Zilic, Zeljko (2016) -
Characterization and simulation methodology for time-dependent variability in advanced technologies
Weckx, Pieter; Kaczer, Ben; Raghavan, Praveen; Franco, Jacopo; Simicic, Marko; Roussel, Philippe; Linten, Dimitri; Thean, Aaron; Verkest, Diederik; Catthoor, Francky; Groeseneken, Guido (2015) -
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies
Huynh Bao, Trong; Yakimets, Dmitry; Ryckaert, Julien; Ciofi, Ivan; Baert, Rogier; Veloso, Anabela; Boemmels, Juergen; Collaert, Nadine; Roussel, Philippe; Demuynck, Steven; Raghavan, Praveen; Mercha, Abdelkarim; Tokei, Zsolt; Verkest, Diederik; Thean, Aaron; Wambacq, Piet (2014-09)