Browsing by Author "Croes, Kris"
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Publication 3D technology roadmap and status
Proceedings paper2011, IEEE International Interconnect Technology Conference and Materials for Advanced Metallization - IITC/MAM, 8/05/2011Publication A new degradation model and lifetime extrapolation technique for lightly doped drain NMOSFETs under hot-carrier degradation
Journal article2001, Microelectronics Reliability, (41) 3, p.437-443Publication A new lifetime extrapolation technique for LDD NMOSFETS under hot-carrier degradation
Proceedings paper1999, ESSDERC'99 - Proceedings of the 29th European Solid-State Device Research Conference; 13-15 September 1999; Leuven, Belgium., p.584-587Publication Automated PathFinding tool chain for 3D-stacked integrated circuits: practical case study
Proceedings paper2009-09, IEEE 3D System Integration Conference - 3DSIC, 28/09/2009Publication Copper through silicon via induced keep out zone for 10nm node bulk FinFET CMOS technology
; ; ; Publication Design method and algorithms for directed self-assembly aware via layout decomposition in sub-7 nm circuits
Journal article2016-11, Journal of Micro/Nanolithography MEMS and MOEMS, (15) 4, p.43506Publication Design method for the integration of DSA via patterning in sub-7 nm circuits
Oral presentation2016, International Nanotechnology Conference - INC12Publication Design strategy for integrating DSA via patterning in sub-7 nm interconnects
Proceedings paper2016, Design-Process-Technology Co-optimization for Manufacturability X, 21/02/2016, p.97810NPublication Design technology co-optimization for N10
Proceedings paper2014, IEEE Proceedings of the Custom Integrated Circuits Conference - CICC, 15/09/2014, p.1-8Publication Design, verification and simulation of 3D circuit
Oral presentation2009, Design, Automation and Test in Europe Conference - DATE: Workshop on 3D Integration (W5)Publication Efficient system exploration and synthesis of applications with dynamic data storage and intensive data transfer
Publication Investigation of correlations between parameters defining the state of sputtered particles
Proceedings paper1998, SIMS XI - Secondary Ion Mass Spectrometry, 8/09/1997, p.931-934Publication Investigation of the correlation between parameters defining the state of sputtered particles
Oral presentation1997, SIMS XI; 8-12 September 1997; Orlando, Fl., USA.Publication Investigation of the formation of M-2(+)-molecular ions in sputtering processes
Journal article1999, Journal of the American Society for Mass Spectrometry, (10) 3, p.246-253Publication Matisse: a system-on-chip design methodology emphasizing dynamic memory management
Journal article1999, Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, (21) 3, p.185-194Publication Mattisse: a system-on-chip design methodology emphasizing dynamic memory management
Proceedings paper1998, Proceedings IEEE Computer Society Workshop on VLSI '98: System Level Design, 16/04/1998, p.110-115Publication Modelling hot carrier degradation of LDD NMOSFETs by using a high resolution measurement technique
Journal article1999, Microelectronics and Reliability, (39) 6_7, p.785-790Publication TEASE: A systematic analysis framework for early evaluation of FinFET-based advanced technology nodes
Proceedings paper2013, 50th ACM/EDAC/IEEE Design Automation Conference - DAC, 2/06/2013