Browsing by Author "Lin, Vic"
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Publication Enabling the high-performance InGaAs/Ge CMOS: a common gate stack solution
Proceedings paper2009, IEEE International Electron Device Meeting - IEDM, 7/12/2009, p.327-330Publication Epitaxial Ge on standard STI patterned Si wafers: high quality virtual substrates for Ge pMOS and III/V nMOS
Meeting abstract2009, 216th ECS Meeting, 4/10/2009, p.2387Publication Epitaxial Ge on standard STI patterned Si wafers: high quality virtual substrates for Ge pMOS and III/V nMOS
Proceedings paper2009, ULSI Process Integration 6, 4/10/2009, p.335-350Publication Fabrication of high quality Ge virtual substrates by selective epitaxial growth in shallow trench isolated Si (001) trenches
;Wang, Gang; ; ;Takeuchi, Shotaro; ;Lee, WMeeting abstract2009, E-MRS Spring Meeting Symposium I: Silicon and Germanium Issues for Future CMOS Devices, 8/06/2009Publication Fabrication of high qualtiy Ge virtual substrates by selective epitaxial growth in shallow trench isolated Si (001) trenches
;Wang, Gang; ;Takeuchi, Shotaro; ;Lin, Vic; Journal article2010, Thin Solid Films, (518) 9, p.2538-2541Publication High quality and low cost fabrication of virtual Ge substrates on STI patterned Si wafers
; ;Wang, Gang; ; ;Takeuchi, Shotaro; Lin, VicProceedings paper2009-09, 1st International Workshop on Si based Nano-Electronics and -Photonics (SiNEP-09), 20/09/2009, p.77-78Publication High quality Ge virtual substrates on Si wafers with standard STI patterning
Journal article2010, Journal of the Electrochemical Society, (157) 1, p.H13-H21Publication Impact of Epi-Si growth temperature on Ge-pFET performance
Proceedings paper2009-09, 39th European Solid-State Device Research Conference - ESSDERC, 14/09/2009, p.411-414Publication Use of p- and n-type vapor phase doping and sub-melt laser anneal for extension junctions in sub-32 nm CMOS technology
Meeting abstract2009, Abstracts 6th International Conference on Silicon Epitaxy and Heterostructures - ICSI-6, 17/05/2009, p.78-79