Browsing by Author "Minas, Nikolaos"
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Publication 3D Integration: Circuit design, test and reliability challenges
Proceedings paper2010, 16th IEEE International On-Line Testing Symposium - IOLTS, 5/07/2010, p.217Publication Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performances
Proceedings paper2010, IEEE International Electron Devices Meeting - IEDM, 6/12/2010, p.26-29Publication Design issues and cosiderations for low-cost 3D TSV IC technology
Proceedings paper2010, IEEE International Solid-State Circuits Conference - ISSCC, 8/02/2010, p.148-149Publication Design of test structures for the characterization of thermal-mechanical stress in 3D stacked IC
Journal article2012, IEEE Transactions on Semiconductor Manufacturing, (25) 3, p.365-371Publication Impact of thinning and through silicon via proximity on high-k / metal gate first CMOS performance
Proceedings paper2010, IEEE Symposium on VLSI Technology, 15/06/2010, p.109-110Publication In-tier diagnosis of power domains in 3D TSV ICs
Proceedings paper2012, IEEE International 3D Systems Integration Conference - 3DIC, 31/01/2012, p.7-FebPublication Test structures for characterization of thermal-mechanical stress in 3D stacked IC for analog design
Proceedings paper2010, 23rd IEEE International Conference on Microelectronic Test Structures - ICMTS, 22/03/2010, p.140-144Publication Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack – challenges and solutions
Proceedings paper2010-09, IEEE Custom Integrated Circuits Conference - CICC, 19/09/2010, p.1-4