Browsing by author "Ramesh, Siva"
Now showing items 1-20 of 21
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A Novel Ni-Al Alloy Metal Induced Lateral Crystallization Process for Improved Channel Conduction in 3-D NAND Flash
Ramesh, Siva; Banerjee, Kaustuv; Opsomer, Karl; Rachita, Iuliana; Bastos, Joao; Soulie, Jean-Philippe; Sebaai, Farid; Favia, Paola; Korytov, Maxim; Richard, Olivier; Breuil, Laurent; Arreghini, Antonio; Van den Bosch, Geert; Rosmeulen, Maarten (2022) -
Beyond-Si materials and devices for more Moore and more than Moore applications
Collaert, Nadine; Alian, AliReza; Arimura, Hiroaki; Boccardi, Guillaume; Eneman, Geert; Franco, Jacopo; Ivanov, Tsvetan; Lin, Dennis; Mitard, Jerome; Ramesh, Siva; Rooyackers, Rita; Schaekers, Marc; Sibaja-Hernandez, Arturo; Sioncke, Sonja; Smets, Quentin; Vais, Abhitosh; Vandooren, Anne; Veloso, Anabela; Verhulst, Anne; Verreck, Devin; Waldron, Niamh; Walke, Amey; Witters, Liesbeth; Yu, Hao; Zhou, Daisy; Thean, Aaron (2016) -
Effective contact resistivity reduction for Mo/Pd/n-In0.53Ga0.47As contact
Zhang, Jian; Wang, Linlin; Yu, Hao; Merckling, Clement; Mols, Yves; Vais, Abhitosh; Ramesh, Siva; Ivanov, Tsvetan; Schaekers, Marc; Horiguchi, Naoto; Mocuta, Dan; Collaert, Nadine; De Meyer, Kristin; Jiang, Yulong (2019) -
Enabling 3D NAND Trench Cells for Scaled Flash Memories
Rachidi, Sana; Ramesh, Siva; Breuil, Laurent; Tao, Zheng; Verreck, Devin; Donadio, Gabriele Luca; Arreghini, Antonio; Van den Bosch, Geert; Rosmeulen, Maarten (2023) -
Erase behavior of charge trap flash memory devices using high-k dielectric as blocking oxide liner
Ramesh, Siva; Ajaykumar, Arjun; Bastos, Joao; Breuil, Laurent; Arreghini, Antonio; Nyns, Laura; Soulie, Jean-Philippe; Ragnarsson, Lars-Ake; Schleicher, Filip; Jossart, Nico; Stiers, Jimmy; Van den Bosch, Geert; Rosmeulen, Maarten (2020) -
First demonstration of MOVPE In1-xGaxAs macaroni channel for 3-D NAND memory devices
Ramesh, Siva; Vadakupudhu Palayam, Senthil; Rosseel, Erik; Arreghini, Antonio; Kunert, Bernardette; Baryshnikova, Marina; Zhang, Liping; Ong, Patrick; Teugels, Lieve; Pak, Murat; Jossart, Nico; Raymaekers, Tom; Stiers, Jimmy; Van den Bosch, Geert; Furnemont, Arnaud (2019) -
First demonstration of ruthenium and molybdenum word lines integrated into 40nm ptch 3D NAND memory devices
Ajaykumar, Arjun; Breuil, Laurent; Katcko, Kostantine; Schleicher, Filip; Sebaai, Farid; Oniki, Yusuke; Ramesh, Siva; Arreghini, Antonio; Nyns, Laura; Soulie, Jean-Philippe; Stiers, Jimmy; Rosmeulen, Maarten; Van den Bosch, Geert (2021) -
Gate MOSCAP Studies on Electroless Deposited Nickel Boron as Word Line Candidate Metal for Future Scaled 3-D NAND Flash
Ramesh, Siva; Rachidi, Sana; Donadio, Gabriele Luca; Van den Bosch, Geert; Rosmeulen, Maarten (2023) -
High-K incorporated in a SiON tunnel layer for 3D NAND programming voltage reduction
Breuil, Laurent; Nyns, Laura; Rachidi, Sana; Banerjee, Kaustuv; Arreghini, Antonio; Bastos, Joao; Ramesh, Siva; Van den Bosch, Geert; Rosmeulen, Maarten (2022) -
Integration of Ruthenium-based Wordline in a 3-D NAND Memory Devices
Breuil, Laurent; El Hajjam, Gabriel; Ramesh, Siva; Ajaykumar, Arjun; Arreghini, Antonio; Zhang, Liping; Sebaai, Farid; Nyns, Laura; Raymaekers, Tom; Rosmeulen, Maarten; Van den Bosch, Geert; Furnemont, Arnaud (2020) -
Junctionless gate-all-around lateral and vertical nanowire FETs with simplified processing for advanced logic and analog/RF applications and scaled SRAM cells
Veloso, Anabela; Parvais, Bertrand; Matagne, Philippe; Simoen, Eddy; Huynh Bao, Trong; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Rosseel, Erik; Ercken, Monique; Chan, BT; Delvaux, Christie; Altamirano Sanchez, Efrain; Versluijs, Janko; Tao, Zheng; Suhard, Samuel; Brus, Stephan; Sibaja-Hernandez, Arturo; Waldron, Niamh; Lagrain, Pieter; Richard, Olivier; Bender, Hugo; Vaisman Chasin, Adrian; Kaczer, Ben; Ivanov, Tsvetan; Ramesh, Siva; De Meyer, Kristin; Ryckaert, Julien; Collaert, Nadine; Thean, Aaron (2016) -
Optimization of Retention in Ferroelectricity Boosted Gate Stacks for 3D NAND
Breuil, Laurent; Popovici, Mihaela Ioana; Stiers, Jimmy; Arreghini, Antonio; Ramesh, Siva; Van den Bosch, Geert; Van Houdt, Jan; Rosmeulen, Maarten (2023) -
Record performance top-down In0.53Ga0.47As vertical nanowire FETs and vertical nanosheets
Ramesh, Siva; Ivanov, Tsvetan; Putcha, Vamsi; Alian, AliReza; Sibaja-Hernandez, Arturo; Rooyackers, Rita; Camerotto, Elisabeth; Milenin, Alexey; Pinna, Nicolo; El Kazzi, Salim; Veloso, Anabela; Lin, Dennis; Lagrain, Pieter; Favia, Paola; Collaert, Nadine; De Meyer, Kristin (2017) -
Reliability of Mo as Word Line Metal in 3D NAND
Tierno, Davide; Croes, Kristof; Ajaykumar, Arjun; Ramesh, Siva; Van den Bosch, Geert; Rosmeulen, Maarten (2021) -
Top-down InGaAs nanowire and Fin vertical FETs with record performance
Ramesh, Siva; Ivanov, Tsvetan; Camerotto, Elisabeth; Sun, N.; Franco, Jacopo; Sibaja-Hernandez, Arturo; Rooyackers, Rita; Alian, AliReza; Loo, Josine; Veloso, Anabela; Milenin, Alexey; Lin, Dennis; Favia, Paola; Bender, Hugo; Collaert, Nadine; Thean, Aaron; De Meyer, Kristin (2016) -
Understanding the factors affecting contact resistance in nanowire field effect transistors (NWFETs) to improve nanoscale contacts for future scaling
Ramesh, Siva; Ivanov, Tsvetan; Sibaja-Hernandez, Arturo; Alian, AliReza; Camerotto, Elisabeth; Milenin, Alexey; Pinna, Nicolo; El Kazzi, S.; Lin, Dennis; Lagrain, Pieter; Favia, Paola; Bender, Hugo; Collaert, Nadine; De Meyer, K. (2022) -
Understanding the kinetics of Metal Induced Lateral Crystallization process to enhance the poly-Si channel quality and current conduction in 3-D NAND memory
Ramesh, Siva; Vadakupudhu Palayam, Senthil; Ajaykumar, Arjun; Opsomer, Karl; Bastos, Joao; Ragnarsson, Lars-Ake; Breuil, Laurent; Arreghini, Antonio; Wouters, Lennaert; Spampinato, Valentina; Favia, Paola; Nalin Mehta, Ankit; Carolan, Patrick; Nyns, Laura; Katcko, Kostantine; Stiers, Jimmy; Van den Bosch, Geert; Rosmeulen, Maarten (2021) -
Understanding the Origin of Metal Gate Work Function Shift and Its Impact on Erase Performance in 3D NAND Flash Memories
Ramesh, Siva; Ajaykumar, Arjun; Ragnarsson, Lars-Ake; Breuil, Laurent; El Hajjam, Gabriel Khalil; Kaczer, Ben; Belmonte, Attilio; Nyns, Laura; Soulie, Jean-Philippe; van den Bosch, Geert; Rosmeulen, Maarten (2021) -
Vertical devices for future nano-electronic applications
Collaert, Nadine; Veloso, Anabela; Huynh Bao, Trong; Yakimets, Dmitry; Ivanov, Tsvetan; Ramesh, Siva; Matagne, Philippe; Sibaja-Hernandez, Arturo; Liu, Ziyang; Merckling, Clement; Waldron, Niamh; Thean, Aaron (2016) -
Vertical III-V gate-all-around nanowire MOSFETs: Process integration and contact resistance study
Ramesh, Siva (2020-04)