Browsing by author "Chang, Shou-Zen"
Now showing items 1-18 of 18
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Achieving low VT Ni-FUSI CMOS via lanthanide incorporation in the gate stack
Veloso, Anabela; Yu, HongYu; Lauwers, Anne; Chang, Shou-Zen; Adelmann, Christoph; Onsia, Bart; Demand, Marc; Brus, Stephan; Vrancken, Christa; Singanamalla, Raghunath; Lehnen, Peer; Kittl, Jorge; Kauerauf, Thomas; Vos, Rita; O'Sullivan, Barry; Van Elshocht, Sven; Mitsuhashi, Riichirou; Whittemore, G.; Yin, K.M.; Niwa, Masaaki; Hoffmann, Thomas; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2007-09) -
Achieving low-VT Ni-FUSI CMOS via Lanthanide incorporation in the gate stack
Veloso, Anabela; Yu, HongYu; Lauwers, Anne; Chang, Shou-Zen; Adelmann, Christoph; Onsia, Bart; Demand, Marc; Brus, Stephan; Vrancken, Christa; Singanamalla, Raghunath; Lehnen, Peer; Kittl, Jorge; Kauerauf, Thomas; Vos, Rita; O'Sullivan, Barry; Van Elshocht, Sven; Mitsuhashi, Riichirou; Whittemore, G.; Yin, K.M.; Niwa, Masaaki; Hoffmann, Thomas; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2008) -
Application of combinatorial methodologies for work function engineering of metal gate/high-k advanced gate stacks
Green, M.L.; Chang, Shou-Zen; De Gendt, Stefan; Schram, Tom; Hattrick-Simpers, J. (2007-09) -
Cost effective low Vt Ni-FUSI CMOS on SiON by means of Al implant (pMOS) and Yb+P implant (nMOS)
Lauwers, Anne; Veloso, Anabela; Chang, Shou-Zen; Yu, HongYu; Hoffmann, Thomas Y.; Kerner, Christoph; Demand, Marc; Rothschild, Aude; Niwa, Masaaki; Satoru, Ito; Mitshashi, Riichirou; Ameen, Mike; Whittemore, Graham; Pawlak, Malgorzata; Vrancken, Christa; Demeurisse, Caroline; Mertens, Sofie; Vandervorst, Wilfried; Absil, Philippe; Biesemans, Serge; Kittl, Jorge (2008) -
Demonstration of low Vt Ni-FUSI N-MOSFETs with SiON dielectrics by using a Dy2O3 cap layer
Yu, HongYu; Chang, Shou-Zen; Veloso, Anabela; Lauwers, Anne; Adelmann, Christoph; Onsia, Bart; Lehnen, Peer; Kauerauf, Thomas; Brus, Stephan; Absil, Philippe; Biesemans, Serge (2007-11) -
Demonstration of metal-gated low Vt n-MOSFETs using a Poly-Si/TaN/Dy2O3/SiON gate stack with a scaled EOT value
Yu, HongYu; Singanamalla, Raghunath; Ragnarsson, Lars-Ake; Chang, Vincent; Cho, Hag-Ju; Mitsuhashi, Riichirou; Adelmann, Christoph; Van Elshocht, Sven; Lehnen, Peer; Chang, Shou-Zen; Yin, K.M.; Schram, Tom; Kubicek, Stefan; De Gendt, Stefan; Absil, Philippe; De Meyer, Kristin; Biesemans, Serge (2007) -
Demonstration of phase-controlled Ni-FUSI CMOSFETs employing SiON dielectrics capped with sub-monolayer ALD HfSiON for low power applications
Yu, HongYu; Chang, Shou-Zen; Veloso, Anabela; Lauwers, Anne; Delabie, Annelies; Everaert, Jean-Luc; Singanamalla, Raghunath; Kerner, Christoph; Vrancken, Christa; Brus, Stephan; Absil, Philippe; Hoffmann, Thomas; Biesemans, Serge (2007-09) -
Electrical properties of low-VT metal-gated n-MOSFETs using La2O3/SiOx as interfacial layer between HfLaO high-k dielectrics and Si channel
Chang, Shou-Zen; Yu, Hong-Yu; Adelmann, Christoph; Delabie, Annelies; Wang, Xin Peng; Van Elshocht, Sven; Akheyar, Amal; Nyns, Laura; Swerts, Johan; Aoulaiche, Marc; Kerner, Christoph; Absil, Philippe; Hoffmann, Thomas Y.; Biesemans, Serge (2008-05) -
Low VT metal-gate/high-k nMOSFETs - PBTI dependence and VT tune-ability on La/Dy-capping layer locations and laser annealing conditions
Chang, Shou-Zen; Hoffmann, Thomas Y.; Yu, HongYu; Aoulaiche, Marc; Rohr, Erika; Adelmann, Christoph; Kaczer, Ben; Delabie, Annelies; Favia, Paola; Van Elshocht, Sven; Kubicek, Stefan; Schram, Tom; Witters, Thomas; Ragnarsson, Lars-Ake; Wang, Xin Peng; Cho, Hag-Ju; Mueller, Markus; Chiarella, Thomas; Absil, Philippe; Biesemans, Serge (2008) -
Low Vt Ni-FUSI CMOS technology using a DyO cap layer with either single or dual Ni-phases
Yu, HongYu; Chang, Shou-Zen; Veloso, Anabela; Lauwers, Anne; Adelmann, Christoph; Onsia, Bart; Van Elshocht, Sven; Singanamalla, Raghunath; Demand, Marc; Vos, Rita; Kauerauf, Thomas; Brus, Stephan; Shi, Xiaoping; Kubicek, Stefan; Vrancken, Christa; Mitsuhashi, Riichirou; Lehnen, Peer; Kittl, Jorge; Niwa, M.; Yin, K.M.; Hoffmann, Thomas; De Gendt, Stefan; Jurczak, Gosia; Absil, Philippe; Biesemans, Serge (2007) -
Modulation of the effective work function of fully-silicided (FUSI) gate stacks
Kittl, Jorge; Lauwers, Anne; Pawlak, Malgorzata; Veloso, Anabela; Yu, HongYu; Chang, Shou-Zen; Hoffmann, Thomas Y.; Pourtois, Geoffrey; Brus, Stephan; Demeurisse, Caroline; Vrancken, Christa; Absil, Philippe; Biesemans, Serge (2007) -
Nitrogen profile and dielectric cap layer (Al2O3, Dy2O3, La2O3) engineering on Hf-silicate
Cho, Hag-Ju; Yu, HongYu; Ragnarsson, Lars-Ake; Chang, Vincent; Schram, Tom; O'Sullivan, Barry; Kubicek, Stefan; Mitsuhashi, Riichirou; Akheyar, Amal; Van Elshocht, Sven; Witters, Thomas; Delabie, Annelies; Adelmann, Christoph; Rohr, Erika; Singanamalla, Raghunath; Chang, Shou-Zen; Swerts, Johan; Lehnen, Peer; De Gendt, Stefan; Absil, Philippe; Biesemans, Serge (2007) -
Novel process to pattern selectively dual dielectric capping layers using soft-mask only
Schram, Tom; Kubicek, Stefan; Rohr, Erika; Brus, Stephan; Vrancken, Christa; Chang, Shou-Zen; Chang, V.S.; Mitsuhashi, Riichiru; Okuno, Yasutoshi; Akheyar, Amal; Cho, Hag-Ju; Hooker, J.C.; Paraschiv, Vasile; Vos, Rita; Sebaai, Farid; Ercken, Monique; Kelkar, Prasad; Delabie, Annelies; Adelmann, Christoph; Witters, Thomas; Ragnarsson, Lars-Ake; Kerner, Christoph; Chiarella, Thomas; Aoulaiche, Marc; Cho, Moon Ju; Kauerauf, Thomas; De Meyer, Kristin; Lauwers, Anne; Hoffmann, Thomas Y.; Absil, Philippe; Biesemans, Serge (2008) -
Strain enhanced FUSI/HfSiON technology with optimized CMOS process window
Veloso, Anabela; Verheyen, Peter; Vos, Rita; Brus, Stephan; Ito, Satoru; Mitsuhashi, Riichirou; Paraschiv, Vasile; Shi, Xiaoping; Onsia, Bart; Arnauts, Sophia; Loo, Roger; Lauwers, Anne; Conard, Thierry; de Marneffe, Jean-Francois; Goossens, Danny; Baute, Debbie; Locorotondo, Sabrina; Chiarella, Thomas; Kerner, Christoph; Vrancken, Christa; Mertens, Sofie; O'Sullivan, Barry; Yu, HongYu; Chang, Shou-Zen; Niwa, Masaaki; Kittl, Jorge; Absil, Philippe; Jurczak, Gosia; Hoffmann, Thomas Y.; Biesemans, Serge (2007) -
Strain enhanced Low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay
Kubicek, Stefan; Schram, Tom; Rohr, Erika; Paraschiv, Vasile; Vos, Rita; Demand, Marc; Adelmann, Christoph; Witters, Thomas; Nyns, Laura; Delabie, Annelies; Ragnarsson, Lars-Ake; Chiarella, Thomas; Kerner, Christoph; Mercha, Abdelkarim; Parvais, Bertrand; Aoulaiche, Marc; Ortolland, Claude; Yu, HongYu; Veloso, Anabela; Witters, Liesbeth; Singanamalla, Raghunath; Kauerauf, Thomas; Brus, Stephan; Vrancken, Christa; Chang, V.S.; Chang, Shou-Zen; Mitsuhashi, Riichirou; Okuno, Yasutoshi; Akheyar, Amal; Cho, Hag-Ju; Hooker, J.; O'Sullivan, Barry; Van Elshocht, Sven; De Meyer, Kristin; Jurczak, Gosia; Absil, Philippe; Biesemans, Serge; Hoffmann, Thomas Y. (2008) -
The application of an ultra-thin ALD HfSiON cap layer on SiON dielectrics for Ni-FUSI CMOS technology targeting at low power applications
Chang, Shou-Zen; Yu, HongYu; Veloso, Anabela; Lauwers, Anne; Delabie, Annelies; Everaert, Jean-Luc; Kerner, Christoph; Absil, Philippe; Hoffmann, Thomas Y.; Biesemans, Serge (2007) -
Transistor threshold voltage modulation by Dy2O3 rare-earth oxide capping: The role of bulk dielectrics charge
Yu, Hong-Yu; Chang, Shou-Zen; Aoulaiche, Marc; Wang, Xin Peng; Adelmann, Christoph; Kaczer, Ben; Absil, Philippe; Lauwers, Anne; Biesemans, Serge (2008) -
Understanding and prediction of EWF modulation induced by various dopants in the gate stack for a gate-first integration scheme
Wang, Xin Peng; Yu, HongYu; Yeo, Y.-C.; Li, M.-F.; Chang, Shou-Zen; Cho, Hag-Ju; Kubicek, Stefan; Wouters, Dirk; Groeseneken, Guido; Biesemans, Serge (2008)