Browsing by author "Galeti, M."

Analog application of SOI nFinFETs with different TiN gate electrode thickness operating at cryogenic temperatures

Rodrigues, M.; Galeti, M.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor; Martino, J.A. (2010)

Analog parameters of MuGFET devices with different source/drain engineering

Galeti, M.; Rodrigues, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Aoulaiche, Marc; Claeys, Cor (2012)

Analog performance of SOI FinFETs with different TiN gate electrode thickness

Galeti, M.; Rodrigues, M.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor; Martino, J.A. (2010)

Analog performance of SOI MOSFETs with different TiN gate electrode thickness and hHigh-k dielectrics

Galeti, M.; Rodrigues, M.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor; Martino, J.A. (2011)

BJT effect analysis in p- and n-SOI MuGFETs with high-k gate dielectrics and TiN metal gate electrode for a 1T-DRAM application

Galeti, M.; Rodrigues, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Aoulaiche, Marc; Jurczak, Gosia; Claeys, Cor (2011)

Effects of HfSiO nitridation and TiN metal gate thickness on p- and n-SOI MuGFETs for analog anpplications

Galeti, M.; Rodrigues, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor (2010)

GIDL behavior in UTBOX SOI devices with high-k/metal gate stacks

Rodrigues, M.; Galeti, M.; Martino, J.A.; Collaert, Nadine; Aoulaiche, Marc; Simoen, Eddy; Claeys, Cor (2012)

GIDL behavior of p- and n-MuGFET devices with different TiN metal gate thickness and high-k gate dielectrics

Galeti, M.; Rodrigues, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor (2012)

GIDL behavior with different TiN metal gate thickness and high-k gate dielectric on MuGFET devices

Galeti, M.; Rodrigues, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor (2011)

Improved generation lifetime model for the electrical characterization of single- and double-gate SOI nMOSFETs

Galeti, M.; Martino, J.A.; Simoen, Eddy; Claeys, Cor (2008)

Improved model to determine the generation lifetime in double gate SOI nMOSFETs

Galeti, M.; Martino, J.A.; Simoen, Eddy; Claeys, Cor (2007)

Improved model to determine the generation lifetime in short channel SOI nMOSFETS

Galeti, M.; Martino, J.A.; Simoen, Eddy; Claeys, Cor (2007)

Influence of the sidewall crystal orientation, HfSiO nitridation and TiN metal gate thickness on n-MuGFETs under analog operation

Rodrigues, M.; Galeti, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor (2011)

Larger intrinsic voltage gain achieved with UTBOX SOI devices and thin silicon film

Rodrigues, M.; Galeti, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Aoulaiche, Marc; Claeys, Cor (2012)

Lateral bipolar transistor current gain behavior of MuGFET deviceswith different source/drain engineering

Galeti, M.; Rodrigues, M.; Martino, J.A.; Collaert, Nadine; Aoulaiche, Marc; Simoen, Eddy; Claeys, Cor (2012)

SOI n- and pMuGFET devices with different TiN metal gate tThickness under influence of sidewall crystal orientation

Rodrigues, M.; Galeti, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor (2011)

Temperature and oxide tickness influence on the generation lifetime determination in partially depleted SOI nMOSFETs

Galeti, M.; Martino, J.A.; Simoen, Eddy; Claeys, Cor (2005)

TiN/HfSiON for analog applications of nMuGFETs

Rodrigues, M.; Galeti, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Claeys, Cor (2011)

UTBOX SOI devices with high-k gate dielectric under analog performance

Galeti, M.; Rodrigues, M.; Aoulaiche, Marc; Collaert, Nadine; Simoen, Eddy; Claeys, Cor; Martino, J.A. (2012)