Browsing by author "Dentoni Litta, Eugenio"
Now showing items 21-40 of 61
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FinFETs with Thermally Stable RMG Gate Stack for Future DRAM Peripheral Circuits
Capogreco, Elena; Arimura, Hiroaki; Ritzenthaler, Romain; Brus, Stephan; Oniki, Yusuke; Dupuy, Emmanuel; Sebaai, Farid; Radisic, Dunja; Chan, BT; Zhou, Daisy; Machkaoutsan, V.; Yoon, S.; Itokawa, H.; Yamaguchi, M.; Gao, Z.; Fazan, P.; Chen, Y.; Subramanian, Sujith; Ragnarsson, Lars-Ake; Spessot, Alessio; Dentoni Litta, Eugenio (2022) -
First demonstration of vertically stacked gate-all-around highly strained germanium nanowire pFETs
Capogreco, Elena; Witters, Liesbeth; Arimura, Hiroaki; Sebaai, Farid; Porret, Clément; Hikavyy, Andriy; Loo, Roger; Milenin, Alexey; Eneman, Geert; Favia, Paola; Bender, Hugo; Wostyn, Kurt; Dentoni Litta, Eugenio; Schulze, Andreas; Vrancken, Christa; Opdebeeck, Ann; Mitard, Jerome; Langer, Robert; Holsteyns, Frank; Waldron, Niamh; Barla, Kathy; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018-11) -
First demonstration of vertically-stacked gate-all-around highly-strained germanium nanowire p-FETs
Capogreco, Elena; Witters, Liesbeth; Arimura, Hiroaki; Sebaai, Farid; Porret, Clément; Hikavyy, Andriy; Loo, Roger; Milenin, Alexey; Eneman, Geert; Favia, Paola; Bender, Hugo; Wostyn, Kurt; Dentoni Litta, Eugenio; Schulze, Andreas; Vrancken, Christa; Opdebeeck, Ann; Mitard, Jerome; Langer, Robert; Holsteyns, Frank; Waldron, Niamh; Barla, Kathy; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018) -
First Monolithic Integration of 3D Complementary FET (CFET) on 300mm Wafers
Subramanian, Sujith; Hosseini, Maryam; Chiarella, Thomas; Sarkar, Satadru; Schuddinck, Pieter; Chan, BT; Radisic, Dunja; Mannaert, Geert; Hikavyy, Andriy; Rosseel, Erik; Sebaai, Farid; Peter, Antony; Hopf, Toby; Morin, Pierre; Wang, Shouhua; Devriendt, Katia; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Veloso, Anabela; Dentoni Litta, Eugenio; Baudot, Sylvain; Siew, Yong Kong; Zhou, X.; Briggs, Basoene; Capogreco, Elena; Hung, Joey; Koret, R.; Spessot, Alessio; Ryckaert, Julien; Demuynck, Steven; Horiguchi, Naoto; Boemmels, Juergen (2020) -
Forksheet FETs for Advanced CMOS Scaling: Forksheet-Nanosheet Co-Integration and Dual Work Function Metal Gates at 17nm N-P Space
Mertens, Hans; Ritzenthaler, Romain; Oniki, Yusuke; Briggs, Basoene; Chan, BT; Hikavyy, Andriy; Hopf, Toby; Mannaert, Geert; Tao, Zheng; Sebaai, Farid; Peter, Antony; Vandersmissen, Kevin; Dupuy, Emmanuel; Rosseel, Erik; Batuk, Dmitry; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Abigail, Daniel_; Grieten, Eva; D'have, Koen; Mitard, Jerome; Subramanian, Sujith; Ragnarsson, Lars-Ake; Weckx, Pieter; Chehab, Bilal; Hellings, Geert; Ryckaert, Julien; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021) -
Forksheet FETs with Bottom Dielectric Isolation, Self-Aligned Gate Cut, and Isolation between Adjacent Source-Drain Structures
Mertens, Hans; Ritzenthaler, Romain; Oniki, Yusuke; Puttarame Gowda, Pallavi; Mannaert, Geert; Sebaai, Farid; Hikavyy, Andriy; Rosseel, Erik; Dupuy, Emmanuel; Peter, Antony; Vandersmissen, Kevin; Radisic, Dunja; Briggs, Basoene; Batuk, Dmitry; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Seidel, Felix; Richard, Olivier; Chan, BT; Mitard, Jerome; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022) -
Gate stack engineering to enhance high- $j/metal gate reliability for DRAM I/O applications
O'Sullivan, Barry; Ritzenthaler, Romain; Simoen, Eddy; Dentoni Litta, Eugenio; Schram, Tom; Vaisman Chasin, Adrian; Linten, Dimitri; Horiguchi, Naoto; Machkaoutsan, Vladimir; Fazan, Pierre; Li, Y (2017) -
Gate-First High-k/Metal Gate FinFET for advanced DRAM peripheral transistors
Dupuy, Emmanuel; Capogreco, Elena; Dentoni Litta, Eugenio; Tao, Zheng; Sebaai, Farid; Spessot, Alessio; Horiguchi, Naoto (2022-09-20) -
Gate-stack engineered NBTI improvements in high-voltage logic-for-memory high-k/metal gate devices
O'Sullivan, Barry; Ritzenthaler, Romain; Rzepa, G; Wu, Zhicheng; Dentoni Litta, Eugenio; Richard, Olivier; Conard, Thierry; Machkaoutsan, Vladimir; Fazan, Pierre; Kim, Cheolgyu; Franco, Jacopo; Kaczer, Ben; Grasser, T; Spessot, Alessio; Linten, Dimitri; Horiguchi, Naoto (2019) -
Impact of Back-side Power Delivery Network Layout on the FinFET Device Performance
Arutchelvan, Goutham; Chiarella, Thomas; Arimura, Hiroaki; Veloso, Anabela; Jourdain, Anne; Dentoni Litta, Eugenio; Horiguchi, Naoto; Mitard, Jerome (2022-10-01) -
Impact of Backside Power Delivery Network with Buried Power Rails on Latch-up Immunity in DTCO/STCO
Serbulova, Kateryna; Chen, Shih-Hung; Hellings, Geert; Veloso, Anabela; Jourdain, Anne; De Boeck, Jo; Groeseneken, Guido; Dentoni Litta, Eugenio; Horiguchi, Naoto (2023) -
Impact of dimensions of memory periphery FinFETs on bias temperature instability
Boubaaya, M; O'Sullivan, Barry; Djezzar, B; Franco, Jacopo; Dentoni Litta, Eugenio; Ritzenthaler, Romain; Dupuy, Emmanuel; Machkaoutsan, Vladimir; Fazan, Pierre; Kim, C.; Benaceur-Doumaz, D.; Ferhat Hamida, A.; Spessot, Alessio; Linten, Dimitri; Horiguchi, Naoto (2020) -
Impact of fin height on bias temperature instability of memory periphery FinFETs
Boubaaya, Mohamed; O'Sullivan, Barry; Franco, Jacopo; Dentoni Litta, Eugenio; Ritzenthaler, Romain; Dupuy, Emmanuel; Machkaoutsan, Vladimir; Fazan, Pierre; Cheolgyu Kim, Cheolgyu; Spessot, Alessio; Linten, Dimitri; Horiguchi, Naoto (2019) -
Improving the low-frequency noise performance of input/output DRAM peripheral pMOSFETs
Simoen, Eddy; O'Sullivan, Barry; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Schram, Tom; Fazan, Pierre; Ji, Yunhyuck; Linten, Dimitri; Horiguchi, Naoto (2017) -
Insights into Scaled Logic Devices Connected from Both Wafer Sides
Veloso, Anabela; Eneman, Geert; Matagne, Philippe; Vermeersch, Bjorn; Jourdain, Anne; Arimura, Hiroaki; O'Sullivan, Barry; Chen, Rongmei; De Keersgieter, An; Simoen, Eddy; Radisic, Dunja; Oniki, Yusuke; Lafitte, A.; Brus, Stephan; Beyne, Eric; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022) -
Investigation of access resistance components in Si-channel p-FinFET using cascaded devices.
Eyben, Pierre; Arutchelvan, Goutham; Chiarella, Thomas; Arimura, Hiroaki; Ritzenthaler, Romain; Mitard, Jerome; Dentoni Litta, Eugenio; Horiguchi, Naoto; Goux, Ludovic (2022-09) -
Low temperature source / drain epitaxy and functional silicides: essentials for ultimate contact scaling
Porret, Clément; Everaert, Jean-Luc; Schaekers, Marc; Ragnarsson, Lars-Ake; Hikavyy, Andriy; Rosseel, Erik; Rengo, Gianluca; Loo, Roger; Khazaka, R.; Givens, M.; Piao, Xiaoyu; Mertens, Sofie; Heylen, Nancy; Mertens, Hans; Toledo de Carvalho Cavalcante, Camila; Sterckx, Gunther; Brus, Stephan; Nalin Mehta, Ankit; Korytov, Maxim; Batuk, Dmitry; Favia, Paola; Langer, Robert; Pourtois, Geoffrey; Swerts, Johan; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022) -
Low thermal budget PBTI and NBTI reliability solutions for multi-V-th CMOS RMG stacks based on atomic oxygen and hydrogen treatments
Franco, Jacopo; Arimura, Hiroaki; de Marneffe, Jean-Francois; Claes, Dieter; Brus, Stephan; Vandooren, Anne; Dentoni Litta, Eugenio; Horiguchi, Naoto; Croes, Kristof; Kaczer, Ben (2022) -
Low-temperature atomic and molecular hydrogen anneals for enhanced chemical SiO2 IL quality in low thermal budget RMG stacks
Franco, Jacopo; Arimura, Hiroaki; de Marneffe, Jean-Francois; Wu, Zhicheng; Vandooren, Anne; Ragnarsson, Lars-Ake; Dentoni Litta, Eugenio; Horiguchi, Naoto; Croes, Kristof; Linten, Dimitri; Afanasiev, Valeri; Grasser, T.; Kaczer, Ben (2021) -
Middle-of-line plasma dry etch challenges for Buried Power Rail integration
Radisic, Dunja; Veloso, Anabela; Gupta, Anshul; Hosseini, Maryam; Wang, Shiwei; Mertens, Hans; Chan, BT; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Lazzarino, Frederic; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)