Browsing by imec author "5f830f45512a5ff6804177d907d87c55a2452508"
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Group IV channels for 7nm FinFETs: Performance for SoCs power and speed metrics
Garcia Bardon, Marie; Raghavan, Praveen; Eneman, Geert; Schuddinck, Pieter; Dehan, Morin; Mercha, Abdelkarim; Thean, Aaron; Verkest, Diederik; Steegen, An (2014) -
Heterogeneous nano-electronic devices enabled by monolithic integration of IIIV, Ge, and Si to expand future CMOS functionality
Thean, Aaron; Collaert, Nadine; Waldron, Niamh; Merckling, Clement; Witters, Liesbeth; Loo, Roger; Mitard, Jerome; Rooyackers, Rita; Vandooren, Anne; Verhulst, Anne; Veloso, Anabela; Pourghaderi, Mohammad Ali; Eneman, Geert; Yakimets, Dmitry; Huynh Bao, Trong; Garcia Bardon, Marie; Ryckaert, Julien; Dehan, Morin; Wambacq, Piet; Caymax, Matty (2014) -
High-mobility 0.85nm-EOT Si0.45Ge0.55 pFETs: delivering high performance at scaled VDD
Mitard, Jerome; Witters, Liesbeth; Garcia Bardon, Marie; Christie, Phillip; Franco, Jacopo; Mercha, Abdelkarim; Magnone, Paolo; Crupi, Felice; Ragnarsson, Lars-Ake; Hikavyy, Andriy; Vincent, Benjamin; Chiarella, Thomas; Loo, Roger; Tseng, Joshua; Yamaguchi, Shinpei; Takeoka, Shinji; Wang, Wei-E; Absil, Philippe; Hoffmann, Thomas Y. (2010) -
Holisitic device exploration for 7nm node
Raghavan, Praveen; Garcia Bardon, Marie; Jang, Doyoung; Schuddinck, Pieter; Yakimets, Dmitry; Ryckaert, Julien; Mercha, Abdelkarim; Horiguchi, Naoto; Collaert, Nadine; Mocuta, Anda; Mocuta, Dan; Tokei, Zsolt; Verkest, Diederik; Thean, Aaron; Steegen, An (2015) -
Impact of Fin height variations on SRAM yield
Dobrovolny, Petr; Zuber, Paul; Miranda Corbalan, Miguel; Garcia Bardon, Marie; Chiarella, Thomas; Buchegger, Peter; Mercha, Abdelkarim; Verkest, Diederik; Steegen, An; Horiguchi, Naoto (2012-04) -
Impact of multi-gate device architectures on digital and analog circuits and its implications on system-on-chip technologies
Thean, Aaron; Wambacq, Piet; Lee, Jae Woo; Cho, Moon Ju; Veloso, Anabela; Sasaki, Yuichiro; Chiarella, Thomas; Miyaguchi, Kenichi; Parvais, Bertrand; Garcia Bardon, Marie; Schuddinck, Pieter; Kim, Min-Soo; Horiguchi, Naoto; Dehan, Morin; Mercha, Abdelkarim; Van der Plas, Geert; Collaert, Nadine; Verkest, Diederik (2013) -
Implication of Channel Percolation in Ferroelectric FETs for Threshold Voltage Shift Modeling
Xiang, Yang; Garcia Bardon, Marie; Kaczer, Ben; Alam, Md Nur Kutubul; Ragnarsson, Lars-Ake; Groeseneken, Guido; Van Houdt, Jan (2020) -
Lateral NWFET optimization for beyond 7nm nodes
Yakimets, Dmitry; Jang, Doyoung; Raghavan, Praveen; Eneman, Geert; Mertens, Hans; Schuddinck, Pieter; Mallik, Arindam; Garcia Bardon, Marie; Collaert, Nadine; Mercha, Abdelkarim; Verkest, Diederik; Thean, Aaron; De Meyer, Kristin (2015) -
Lateral versus vertical gate-all-around FETs for beyond 7nm technologies
Yakimets, Dmitry; Huynh Bao, Trong; Garcia Bardon, Marie; Dehan, Morin; Collaert, Nadine; Mercha, Abdelkarim; Tokei, Zsolt; Thean, Aaron; Verkest, Diederik; De Meyer, Kristin (2014) -
Layout-induced stress effects in 14nm & 10nm FinFETs and their impact on performance
Garcia Bardon, Marie; Moroz, Victor; Eneman, Geert; Schuddinck, Pieter; Dehan, Morin; Yakimets, Dmitry; Jang, Doyoung; Van der Plas, Geert; Mercha, Abdelkarim; Thean, Aaron; Verkest, Diederik; Steegen, An (2013) -
Limitations on lateral nanowire scaling beyond 7nm node
Kumar Das, Uttam; Garcia Bardon, Marie; Jang, Doyoung; Eneman, Geert; Schuddinck, Pieter; Yakimets, Dmitry; Raghavan, Praveen; Groeseneken, Guido (2017) -
Logic scaling assessment in 20nm and beyond under electrical and litho constraints
Badaroglu, Mustafa; Garcia Bardon, Marie; Dobrovolny, Petr; Zuber, Paul; Miranda Corbalan, Miguel (2012) -
Low track height standard cell design in iN7 using scaling boosters
Sherazi, Yasser; Jha, Chaitanya; Rodopoulos, Dimitrios; Debacker, Peter; Chava, Bharani; Mattii, Luca; Garcia Bardon, Marie; Schuddinck, Pieter; Raghavan, Praveen; Gerousis, V.; Spessot, Alessio; Verkest, Diederik; Mocuta, Anda; Kim, Ryan Ryoung han; Ryckaert, Julien (2017) -
MEMS in post-processed standard CMOS
Garcia Bardon, Marie; Pereira Neves, Hercules; Puers, Bob; Van Hoof, Chris (2008) -
Physical insights on steep slope FEFETs including nucleation-propagation and charge trapping
Xiang, Yang; Garcia Bardon, Marie; Alam, Md Nur Kutubul; Thesberg, Mischa; Kaczer, Ben; Roussel, Philippe; Popovici, Mihaela Ioana; Ragnarsson, Lars-Ake; Truijen, Brecht; Verhulst, Anne; Parvais, Bertrand; Horiguchi, Naoto; Groeseneken, Guido; Van Houdt, Jan (2019) -
Physics-Based and Closed-Form Model for Cryo-CMOS Subthreshold Swing
Beckers, Arnout; Michl, Jakob; Grill, Alexander; Kaczer, Ben; Garcia Bardon, Marie; Parvais, Bertrand; Govoreanu, Bogdan; De Greve, Kristiaan; Hiblot, Gaspard; Hellings, Geert (2023) -
Power aware FinFET and lateral nanosheet FET targeting for 3nm CMOS technology
Yakimets, Dmitry; Garcia Bardon, Marie; Jang, Doyoung; Schuddinck, Pieter; Sherazi, Yasser; Weckx, Pieter; Miyaguchi, Kenichi; Parvais, Bertrand; Raghavan, Praveen; Spessot, Alessio; Verkest, Diederik; Mocuta, Anda (2017) -
Power-performance trade-offs for lateral nanosheets on ultra-scaled standard cells
Garcia Bardon, Marie; Sherazi, Yasser; Jang, Doyoung; Yakimets, Dmitry; Schuddinck, Pieter; Baert, Rogier; Mertens, Hans; Mattii, Luca; Parvais, Bertrand; Mocuta, Anda; Verkest, Diederik (2018) -
Pseudo two-dimensional model for double gate tunnel FET considering the junctions depletion regions
Garcia Bardon, Marie; Pereira Neves, Hercules; Puers, Bob; Van Hoof, Chris (2010) -
Scaling of BTI reliability in presence of Time-zero Variability – Pathfinding from planar FET to advanced 3-D FinFET nodes
Kukner, Halil; Weckx, Pieter; Franco, Jacopo; Toledano Luque, Maria; Cho, Moon Ju; Kaczer, Ben; Raghavan, Praveen; Jang, Doyoung; Miyaguchi, Kenichi; Garcia Bardon, Marie; Catthoor, Francky; Van der Perre, Liesbet; Lauwereins, Rudy; Groeseneken, Guido (2014)