Browsing by author "De Wachter, Bart"
Now showing items 21-40 of 46
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Design, test generation, processing, and pre- and post-bond measurement results of a 3D-DfT demonstrator chip stack
Marinissen, Erik Jan; De Wachter, Bart; O'Loughlin, Stephen; Deutsch, Sergej; Papameletis, Christos; Burgherr, Tobias (2014-05) -
Design, test generation, processing, and pre- and post-bond measurement results of a 3D-DfT demonstrator chip stack
Marinissen, Erik Jan; De Wachter, Bart; O'Loughlin, Stephen; Deutsch, Sergej; Papameletis, Christos; Burgherr, Tobias (2014) -
Design, verification and simulation of 3D circuit
Katti, Guruprasad; De Wachter, Bart; Nelis, Marc; Dehan, Morin; Cupak, Miroslav; Croes, Kris; Beeckman, Gerd; Marchal, Pol; Stucchi, Michele (2009) -
Direct probing on large-array fine-pitch micro-bumps of a wide-I/O logic-memory interface
Marinissen, Erik Jan; De Wachter, Bart; Smith, Ken; Kiesewetter, Joerg; Taouil, Mottaqiallah; Hamdioui, Said (2014-10) -
Direct probing on large-array fine-pitch micro-bumps of a wide-I/O logic-memory interface
Marinissen, Erik Jan; De Wachter, Bart; Smith, Ken; Kiesewetter, Joerg; Taouil, Mottaqiallah; Hamdioui, Said (2014-10) -
Evaluation of advanced probe cards for large-array fine-pitch micro-bumps
Marinissen, Erik Jan; Fodor, Ferenc; De Wachter, Bart; Kiesewetter, Joerg; Smith, Ken; Hill, Eric (2017-11) -
Hot hole induced damage in 1T-FBRAM on bulk
Aoulaiche, Marc; Collaert, Nadine; Mercha, Abdelkarim; Rakowski, Michal; De Wachter, Bart; Groeseneken, Guido; Altimime, Laith; Jurczak, Gosia (2011) -
IGZO integration scheme for enabling IGZO nFETs
Kljucar, Luka; Mitard, Jerome; Rassoul, Nouredine; Dekkers, Harold; Steudel, Soeren; del Agua Borniquel, Jose Ignacio; De Wachter, Bart; Teugels, Lieve; Tsvetanova, Diana; Devriendt, Katia; Grisin, Ilja; Boccardi, Guillaume; Hody, Hubert; Nag, Manoj; Di Piazza, Luca; Wilson, Chris; Kar, Gouri Sankar; Tokei, Zsolt; Ramalingam, J.; Cao, Yong; Diehl, Daniel L. (2019) -
Imec's 3D-DfT architecture: basics, extensions, and demonstrator results
Marinissen, Erik Jan; De Wachter, Bart; O'Loughlin, Stephen; Deutsch, Sergej; Papameletis, Christos; Burgherr, Tobias (2014-06) -
Impact of 1 $lm TSV via-last integration on electrical performance of advanced FinFET devices
Hiblot, Gaspard; Van Huylenbroeck, Stefaan; Van der Plas, Geert; De Wachter, Bart; Vaisman Chasin, Adrian; Kaczer, Ben; Chiarella, Thomas; Mitard, Jerome; Demuynck, Steven; Beyer, Gerald; Beyne, Eric (2018) -
Impact of through silicon via induced mechanical stress on fully depleted bulk FinFET technology
Guo, Wei; Van der Plas, Geert; Ivankovic, Andrej; Cherman, Vladimir; Eneman, Geert; De Wachter, Bart; Togo, Mitsuhiro; Redolfi, Augusto; Kubicek, Stefan; Civale, Yann; Chiarella, Thomas; Vandevelde, Bart; Croes, Kristof; De Wolf, Ingrid; Debusschere, Ingrid; Mercha, Abdelkarim; Thean, Aaron; Beyer, Gerald; Swinnen, Bart; Beyne, Eric (2012) -
Optimizing the read-out bias for the capacitorless 1T bulk FinFET RAM cell
Collaert, Nadine; Aoulaiche, Marc; Rakowski, Michal; Redolfi, Augusto; De Wachter, Bart; Van Houdt, Jan; Jurczak, Gosia (2009) -
Parametric test for next generation semiconductor technologies
De Wachter, Bart; Marinissen, Erik Jan; Fodor, Ferenc; Hiblot, Gaspard (2017) -
Pre-Bond Testing Through Direct Probing of Large-Array Fine-Pitch Micro-Bumps
Marinissen, Erik Jan; De Wachter, Bart; Kiesewetter, Joerg; Smith, Ken (2019-03) -
Probing complexities of 3D-stacked ICs – A test engineers' perspective
Fodor, Ferenc; De Wachter, Bart; Podpod, Arnita; Stucchi, Michele; Marinissen, Erik Jan (2020-11) -
Probing of large-array, fine-pitch microbumps for 3D ICs
Fodor, Ferenc; De Wachter, Bart; Marinissen, Erik Jan; Kiesewetter, Joerg; Smith, Ken (2017-05) -
Process Integration of High Aspect Ratio Vias with a Comparison between Co and Ru Metallizations
Vega Gonzalez, Victor; Montero Alvarez, Daniel; Versluijs, Janko; Varela Pedreira, Olalla; Jourdan, Nicolas; Puliyalil, Harinarayanan; Chehab, Bilal; Peissker, Tobias; Haider, Ali; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Geypen, Jef; Le, Quoc Toan; Bazzazian, Nina; Heylen, Nancy; van der Veen, Marleen; El-Mekki, Zaid; Webers, Tomas; Vats, H.; Rynders, Luc; Cupak, Miroslav; Lee, Jae Uk; Drissi, Youssef; Halipre, Luc; Gillijns, Werner; Charley, Anne-Laure; Verdonck, Patrick; Witters, Thomas; Van Gompel, Sander; Kimura, Yosuke; Ciofi, Ivan; De Wachter, Bart; Swerts, Johan; Grieten, Eva; Ercken, Monique; Kim, Ryan Ryoung han; Croes, Kristof; Leray, Philippe; Jaysankar, Manoj; Nagesh, Nishanth; Ramakers, Leon; Murdoch, Gayle; Park, Seongho; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021) -
Realizing super-steep subthreshold slope with conventional FDSOI CMOS at low-bias voltages
Lu, Zhichao; Collaert, Nadine; Aoulaiche, Marc; De Wachter, Bart; De Keersgieter, An; Fossum, Jerry; Altimime, Laith; Jurczak, Gosia (2010) -
Reliability and retention of 1T-RAM cell capacitor less on UTBOX SOI substrates
Aoulaiche, Marc; Collaert, Nadine; Simoen, Eddy; Mercha, Abdelkarim; De Wachter, Bart; Bourdelle, K.K.; Nguyen, B.-Y.; Boedt, F.; Delprat, D.; Jurczak, Gosia; Altimime, Laith (2010) -
Study of 3D process impact on advanced CMOS devices
La Manna, Antonio; Guo, Wei; Van Huylenbroeck, Stefaan; Sirignano, Emilio; Cherman, Vladimir; Van der Plas, Geert; De Wachter, Bart; Phommahaxay, Alain; Jourdain, Anne; Beyer, Gerald; Beyne, Eric (2013)