Browsing Articles by imec author "8732393f67b07512e725114ed9e129719bc408be"
Now showing items 1-11 of 11
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3D wafer-level packaging die stacking using spin-on-dielectric polymer liner through-silicon vias
Civale, Yann; Sabuncuoglu Tezcan, Deniz; Philipsen, Harold; Duval, Fabrice; Jaenen, Patrick; Travaly, Youssef; Soussan, Philippe; Swinnen, Bart; Beyne, Eric (2011) -
Fabrication of photonic wire and crystal circuits in silicon-on-insulator using 193nm optical lithography
Selvaraja, Shankar; Jaenen, Patrick; Bogaerts, Wim; Van Thourhout, Dries; Dumon, Pieter; Baets, Roel (2009-01) -
How to use DUV BARCs on topography
Op de Beeck, Maaike; Vandenberghe, Geert; Jaenen, Patrick; Zhang, Fenghong; Delvaux, Christie; Van Puyenbroeck, Ilse; Ronse, Kurt (1998) -
Implementation of ArF resist processes for 130nm and below
Goethals, Mieke; Van Roey, Frieda; Vandenberghe, Geert; Jaenen, Patrick; Pollers, Ingrid; Pollentier, Ivan; Ronse, Kurt (2000) -
Implementation of high-k and metal gate materials for the 45nm node and beyond: gate patterning development
Beckx, Stephan; Demand, Marc; Locorotondo, Sabrina; Henson, Kirklen; Claes, Martine; Paraschiv, Vasile; Shamiryan, Denis; Jaenen, Patrick; Boullart, Werner; De Gendt, Stefan; Biesemans, Serge; Vanhaelemeersch, Serge; Vertommen, Johan; Coenegrachts, Bart (2005-06) -
Optical proximity correction for 0.3 μm i-line lithography
Yen, Anthony; Tzviatkov, Plamen; Wong, Alfred; Juffermans, Casper; Jonckheere, Rik; Jaenen, Patrick; Garofalo, J.; Otto, O.; Ronse, Kurt; Van den hove, Luc (1996) -
Optimisation of bottom-ARC processes with respect to CD control
Op de Beeck, Maaike; Vandenberghe, Geert; Jaenen, Patrick; Zhang, Fenghong; Delvaux, Christie; Van Puyenbroeck, Ilse; Ronse, Kurt; Lamb, J. E.; van der Hilst, J. B. C. (1998) -
Recent advancements in 193 nm step and scan lithography
Goethals, Mieke; Jaenen, Patrick; Pollers, Ingrid; Van Roey, Frieda; Ronse, Kurt; Heskamp, B.; Davies, G. (1999) -
Study of novel EUVL mask absorber candidates
Wu, Meiyi; Thakare, Devesh; De Marneffe, Jean-Francois; Jaenen, Patrick; Souriau, Laurent; Opsomer, Karl; Soulie, Jean-Philippe; Erdmann, Andreas; Mesilhy, Hazem; Naujok, Philipp; Foltin, Markus; Soltwisch, Victor; Saadeh, Qais; Philipsen, Vicky (2021) -
Sub-50nm gate patterning using line-trimming with 248nm or 193nm litho
Pollentier, Ivan; Jaenen, Patrick; Baerts, Christina; Ronse, Kurt (2002) -
Sub-resolution feature OPC as an enabler for manufacturing at 0.2 μm and below
Randall, John; Tritchkov, Alexander; Ronse, Kurt; Jaenen, Patrick (1998)