Browsing Articles by imec author "8e9ef9de79e3f604798a9500160acd478bdb76dd"
Now showing items 1-12 of 12
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A comprehensive benchmark and optimization of 5-nm lateral and vertical GAA 6T-SRAMs
Huynh Bao, Trong; Sakhare, Sushil; Yakimets, Dmitry; Ryckaert, Julien; Thean, Aaron; Mercha, Abdelkarim; Verkest, Diederik; Wambacq, Piet (2016) -
Benchmarking of MoS2 FETs with multigate Si-FET options for 5 nm and beyond
Agarwal Kumar, Tarun; Yakimets, Dmitry; Raghavan, Praveen; Radu, Iuliana; Thean, Aaron; Heyns, Marc; Dehaene, Wim (2015) -
Built-in sheet charge as an alternative to dopant pockets in tunnel field-effect transistors
Verreck, Devin; Verhulst, Anne; Xiang, Yang; Yakimets, Dmitry; El Kazzi, Salim; Parvais, Bertrand; Groeseneken, Guido; Collaert, Nadine; Mocuta, Anda (2018) -
Buried power rail integration with FinFETs for ultimate CMOS scaling
Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020) -
Device exploration of nanosheet transistors for sub-7nm technology node
Jang, Doyoung; Yakimets, Dmitry; Eneman, Geert; Schuddinck, Pieter; Garcia Bardon, Marie; Raghavan, Praveen; Spessot, Alessio; Verkest, Diederik; Mocuta, Anda (2017) -
Ge Devices: a potential candidate for sub-5nm nodes?
Sharan, Neha; Shaik, Khaja Ahmad; Jang, Doyoung; Schuddinck, Pieter; Yakimets, Dmitry; Garcia Bardon, Marie; Mitard, Jerome; Arimura, Hiroaki; Bufler, Fabian; Eneman, Geert; Collaert, Nadine; Parvais, Bertrand; Spessot, Alessio; Mocuta, Anda (2019) -
Junctionless versus inversion-mode lateral semiconductor nanowire transistors
Veloso, Anabela; Matagne, Philippe; Simoen, Eddy; Kaczer, Ben; Eneman, Geert; Mertens, Hans; Yakimets, Dmitry; Parvais, Bertrand; Mocuta, Dan (2018) -
Limitations on lateral nanowire scaling beyond 7nm node
Kumar Das, Uttam; Garcia Bardon, Marie; Jang, Doyoung; Eneman, Geert; Schuddinck, Pieter; Yakimets, Dmitry; Raghavan, Praveen; Groeseneken, Guido (2017) -
Process-induced power-performance variability in sub-5nm III-V tunnel FETs
Xiang, Yang; Verhulst, Anne; Yakimets, Dmitry; Parvais, Bertrand; Mocuta, Anda; Groeseneken, Guido (2019-04) -
Technology/system codesign and benchmarking for lateral and vertical GAA nanowire FETs at 5-nm technology node
Pan, Chenyun; Raghavan, Praveen; Yakimets, Dmitry; Debacker, Peter; Catthoor, Francky; Collaert, Nadine; Tokei, Zsolt; Verkest, Diederik; Thean, Aaron; Naeemi, Azad (2015) -
Understanding energy efficiency benefits of carbon nanotube field-effect transistors for digital VLSI
Hills, Gage; Garcia Bardon, Marie; Doornbos, Gerben; Yakimets, Dmitry; Schuddinck, Pieter; Baert, Rogier; Jang, Doyoung; Mattii, Luca; Sherazi, Yasser; Rodopoulos, Dimitrios; Ritzenthaler, Romain; Lee, Chi-Shuen; Thean, Aaron; Radu, Iuliana; Spessot, Alessio; Debacker, Peter; Catthoor, Francky; Raghavan, Praveen; Shulaker, Max M.; Wong, H.-S. Philip; Mitra, Subhasish (2018) -
Vertical GAAFETs for the ultimate CMOS scaling
Yakimets, Dmitry; Eneman, Geert; Schuddinck, Pieter; Huynh Bao, Trong; Garcia Bardon, Marie; Raghavan, Praveen; Veloso, Anabela; Collaert, Nadine; Mercha, Abdelkarim; Verkest, Diederik; Thean, Aaron; De Meyer, Kristin (2015)