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Browsing by Author "Beynet, Julien"

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    Highly-conformal plasma-enhanced atomic-layer deposition silicon dioxide liner for high aspect-ratio through-silicon via 3D interconnections

    Civale, Yann
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    Redolfi, Augusto  
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    Velenis, Dimitrios  
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    Heylen, Nancy  
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    Beynet, Julien
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    Jung, Insoo
    Proceedings paper
    2012, 4th Electronics System Integration Technologies Conference - ESTC, 17/10/2012
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    Integration and dielectric reliability of 30nm 1/2 pitch structures in Aurora LK HM

    Demuynck, Steven  
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    Huffman, Craig
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    Claes, Martine  
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    Suhard, Samuel  
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    Versluijs, Janko  
    Proceedings paper
    2009, International Conference on Solid State Devices and Materials - SSDM, 7/10/2009, p.1094-1095
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    Integration and dielectric reliability of 30nm ½ pitch structures in Aurora® LK HM

    Demuynck, Steven  
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    Huffman, Craig
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    Claes, Martine  
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    Suhard, Samuel  
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    Versluijs, Janko  
    Journal article
    2010, Japanese Journal of Applied Physics, (49) 4, p.04DB05
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    Integration of porogen-based low-k films: influence of capping layer thickness and long thermal anneals on low-k damage and reliability

    De Roest, David  
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    Vereecke, Bart  
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    Huffman, Craig
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    Heylen, Nancy  
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    Croes, Kristof  
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    Arai, H
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    Takamure, N
    Meeting abstract
    2009, Advanced Metallization Conference, 13/10/2009
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    Integration of porogen-based low-k films: influence of capping layer thickness and long thermal anneals on low-k damage and reliability

    De Roest, David  
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    Vereecke, Bart  
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    Huffman, Craig
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    Heylen, Nancy  
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    Croes, Kristof  
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    Arai, H.
    Oral presentation
    2009, ADMETA 2009
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    Key factors to sustain the extension of a MHM-based integration scheme to medium and high porosity PECVD low-k materials

    Travaly, Youssef
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    Van Aelst, Joke  
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    Truffert, Vincent  
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    Verdonck, Patrick  
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    Dupont, Tania  
    Proceedings paper
    2008, 11th IEEE International Interconnect Technology Conference - IITC, 1/06/2008, p.52-54
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    Low temperature plasma-enhanced ALD enables cost-effective spacer defined double patterning (SDDP)

    Beynet, Julien
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    Wong, Patrick  
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    Miller, Andy  
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    Locorotondo, Sabrina  
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    Vangoidsenhoven, Diziana  
    Proceedings paper
    2009, SPIE Lithography Asia Taiwan, 18/11/2009, p.75201J
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    Plasma enhanced atomic layer deposition of silicon oxide for through silicon via

    Kwon, Hak-Yong
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    Kim, Jeon-Ho
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    Kim, Young-Hoon
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    Kim, Young-Jae
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    Kim, Dae-Youn
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    Choi, Seung-Woo
    Proceedings paper
    2010, 10th International Conference on Atomic Layer Deposition - ALD, 20/06/2010
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    Relationships between deposition parameters, step coverage, throughput, and electrical properties of PEALD SiO2 insulation liners for HVM TSV application

    Jung, In Soo
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    Woo, Jeong-Jun
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    Kwon, Hak Yong
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    Kim, Young-Jae
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    Kang, Dong-Suk
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    Park, Ju-Hyuk
    Meeting abstract
    2011, 11th International Conference on Atomic Layer Deposition - ALD, 26/06/2011
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    Use of MIR-FTIR and k-value measurements to assess potential solutions to reduce damage during porous low-k integration

    Beynet, Julien
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    De Roest, David  
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    Rochat, N.
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    Kellens, Kristof  
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    Verdonck, Patrick  
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    Sprey, Hessel  
    Proceedings paper
    2009, International Semiconductor Technology Conference - ISTC/CSTIC, 19/03/2009, p.275-280
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    Variation in process conditions of porogen-based low-k films: a method to improve performance without changing existing process steps in a sub-100nm Cu damascene integration route

    De Roest, David  
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    Travaly, Youssef
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    Beynet, Julien
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    Sprey, Hessel  
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    Labat, Julianne
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    Huffman, Craig
    Meeting abstract
    2009, 18th Workshop Materials for Advanced Metallization - MAM, 8/03/2009

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