Browsing by Author "Tzviatkov, Plamen"
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Publication 100-nm generation contact patterning by low temperature 193-nm resist reflow process
Proceedings paper2002, Advances in Resist Technology and Processing XIX, 4/03/2002, p.631-642Publication 100nm generation contact patterning by low temperature 193nm resist reflow process
Journal article2002, Semiconductor Fabtech, 16, p.?-?Publication 248 nm lithography for the 0.18 μm generation
Proceedings paper1996, Proceedings of the Microlithography Seminar INTERFACE'96, 27/10/1996, p.29-42Publication Evaluation of advanced I-line resists for practical 0.5*(l/NA) lithography
Proceedings paper1994, OCG Microlithography Seminar INTERFACE, 6/11/1994, p.105-124Publication Feasibility of 250 nm gate patterning using i-line with OPC
Journal article1998, Microelectronic Engineering, 41/42, p.111-116Publication Impact of SEM accuracy on the CD control during gate patterning process of 0.25μm and sub-0.25μm generations
Proceedings paper1997, Proceedings Interface '97 Microlithography Symposium, p.17-30Publication Increasing DOF for VIA lithography using a non-CMP based architecture
Proceedings paper1997, Proceedings Interface '97 Microlithography Symposium;, p.249-257Publication Introducing 193 nm lithography
Proceedings paper1998, Proceedings of the Microlithography Symposium. Interface '98, 15/11/1998, p.179-198Publication Lithographic performance of 193 nm single and bi-layer materials
Journal article1998, Journal of Photopolymer Science and Technology, (11) 3, p.513-23Publication Low-temperature 193nm resist reflow process for 100 nm generation contact patterning
Proceedings paper2001, Lithography for Semiconductor Manufacturing II, 30/05/2001, p.396-407Publication Optical proximity correction for 0.3 μm i-line lithography
Journal article1996, Microelectronic Engineering, 30, p.141-144Publication Optically enhanced i-line lithography for 0.3-μm random logic applications
Journal article1996, Solid State Technology, (39) March, p.S13-S19Publication Optimisation methodology towards a manufacturable 0.3 μm poly-gate process using i-line lithography
Proceedings paper1996, Proceedings of the Microlithography Seminar INTERFACE, 27/10/1996, p.223-246Publication Optimizing i-line lithography for 0.3-μm poly-gate manufacturing
Journal article1997, Solid State Technology, (40) March, p.S5-S14Publication SEM proximity effect for poly gate patterns
Journal article1997, Microlithography World, (6) 4, p.5-10