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Browsing by Author "Vellianitis, Georgios"

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    Application of HCl etch in the production of novel devices

    Hikavyy, Andriy  
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    Rooyackers, Rita
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    Verheyen, Peter  
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    Vellianitis, Georgios  
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    Van Dal, Mark  
    Meeting abstract
    2008, 213th ECS Meeting, 18/05/2008, p.647
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    Application of HCl gas phase etch in the production of novel devices

    Hikavyy, Andriy  
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    Rooyackers, Rita
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    Verheyen, Peter  
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    Leys, Frederik
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    Vellianitis, Georgios  
    Proceedings paper
    2008-05, Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS. 4: New Materials, Processes, and Equipment, 18/05/2008, p.329-335
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    Characteristics and integration challenges of FinFET-based devices for (Sub-)22nm technology nodes circuit applications

    Veloso, Anabela  
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    Van Dal, Mark  
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    Collaert, Nadine  
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    De Keersgieter, An  
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    Witters, Liesbeth  
    Proceedings paper
    2009-10, International Conference on Solid-State Devices and Materials - SSDM, 7/10/2009, p.1040-1041
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    Engineering Strain and Texture in Ferroelectric Scandium-Doped Aluminium Nitride

    McMitchell, Sean  
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    Walke, Amey  
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    Banerjee, Kaustuv  
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    Mertens, Sofie  
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    Piao, Xiaoyu  
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    Mao, Ming  
    Journal article
    2023, ACS APPLIED ELECTRONIC MATERIALS, (5) 2, p.858-864
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    Experimental and physics-based modeling assessment of strain induced mobility enhancement in FinFETs

    Serra, N.
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    Conzatti, F.
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    Esseni, D.
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    De Michielis, M.
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    Palestri, P.
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    Selmi, L.
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    Thomas, S.
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    Whall, T. E.
    Proceedings paper
    2009, IEEE International Electron Devices Meeting - IEDM, 7/12/2009, p.71-74
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    First observation of FinFET specific mismatch behavior and optimization guidelines for SRAM scaling

    Merelle, Thomas
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    Curatola, Gilberto
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    Nackaerts, Axel
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    Collaert, Nadine  
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    Van Dal, Mark  
    Proceedings paper
    2008, Technical Digest International Electron Devices Meeting - IEDM, 15/12/2008, p.241-244
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    Gatestacks for scalable high-performance FinFETs

    Vellianitis, Georgios  
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    Van Dal, Mark  
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    Witters, Liesbeth  
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    Curatola, Gilberto
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    Doornbos, Gerben  
    Proceedings paper
    2007, Technical Digest International Electron Devices Meeting - IEDM, 10/12/2007, p.681-684
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    High performance Si.45Ge.55 implant free quantum well FET featuring low temperature process, eSiGe stressor and transversal strain relaxation

    Yamaguchi, Shinpei
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    Witters, Liesbeth  
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    Mitard, Jerome  
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    Eneman, Geert  
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    Hellings, Geert  
    Proceedings paper
    2011, IEEE International Electron Devices Meeting - IEDM, 5/12/2011, p.829-832
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    Highly manufacturable FinFETs with sub-10nm fin width and high aspect ratio fabricated with immersion lithography

    Van Dal, Mark  
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    Collaert, Nadine  
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    Doornbos, Gerben  
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    Vellianitis, Georgios  
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    Curatola, Gilberto
    Proceedings paper
    2007, Symposium on VLSI Technology. Digest of Technical Papers, 14/06/2007, p.110-111
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    Material aspects and challenges for SOI FinFET integration

    Van Dal, Mark  
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    Vellianitis, Georgios  
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    Duffy, Ray
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    Pawlak, Bartek  
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    Lai, Li-Shyue
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    Hikavyy, Andriy  
    Meeting abstract
    2008, 213th ECS Meeting, 18/05/2008, p.636
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    Material aspects and challenges for SOI FinFET integration

    Van Dal, Mark  
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    Vellianitis, Georgios  
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    Duffy, Ray
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    Doornbos, Gerben  
    ;
    Pawlak, Bartek  
    Proceedings paper
    2008, Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-based CMOS 4: New Materials, Processes, and Equipment, 18/05/2008, p.223-234
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    The influence of TiN thickness and SiO2 formation method on the structural and electrical properties of TiN/HfO2/SiO2 gate stacks

    Vellianitis, Georgios  
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    Van Dal, Mark  
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    Boccardi, Guillaume  
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    Duriez, Blandine  
    ;
    Voogt, Frans
    Journal article
    2009, IEEE Transactions on Electron Devices, (56) 7, p.1548-1553

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