Browsing by author "Miyaguchi, Kenichi"
Now showing items 1-18 of 18
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110GHz Through-Silicon Via's Integrated in Silicon Photonics Interposers for Next-Generation Optical Modules
Miyaguchi, Kenichi; Ban, Yoojin; Pantano, Nicolas; Sun, Xiao; Absil, Philippe; Bogaerts, Lieve; Verheyen, Peter; Velenis, Dimitrios; Pantouvaki, Marianna; Van Campenhout, Joris (2021) -
80 nm tall thermally stable cost effective FinFETs for advanced dynamic random access memory periphery devices for artificial intelligence/machine learning and automotive applications
Spessot, Alessio; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Dupuy, Emmanuel; O'Sullivan, Barry; Bastos, Joao; Capogreco, Elena; Miyaguchi, Kenichi; Machkaoutsan, Vladimir; Yoon, Younggwang; Fazan, Pierre; Horiguchi, Naoto (2021) -
80nm tall thermally stable cost effective FinFETs for advanced DRAM periphery devices for AI/ML and Automotive applications
Spessot, Alessio; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Dupuy, Emmanuel; O'Sullivan, Barry; Bastos, Joao; Capogreco, Elena; Miyaguchi, Kenichi; Machkaoutsan, Vladimir; Yoon, Younggwang; Fazan, Pierre; Horiguchi, Naoto (2020) -
Comparative study of a fully differential op amp in FinFET and planar technologies
Morrison, Sebastien; Parvais, Bertrand; Vandersteen, Gerd; Miyaguchi, Kenichi; Mercha, Abdelkarim; Wambacq, Piet (2014) -
Comparison of NBTI aging on adder architectures and ring oscillators in the downscaled technologies
Kosemura, Daisuke; Weckx, Pieter; Morrison, Sebastien; Franco, Jacopo; Toledano Luque, Maria; Cho, Moon Ju; Raghavan, Praveen; Kaczer, Ben; Jang, Doyoung; Miyaguchi, Kenichi; Garcia Bardon, Marie; Catthoor, Francky; Van der Perre, Liesbet; Lauwereins, Rudy; Groeseneken, Guido (2015) -
Design technology co-optimization for N10
Ryckaert, Julien; Raghavan, Praveen; Baert, Rogier; Garcia Bardon, Marie; Dusa, Mircea; Mallik, Arindam; Sakhare, Sushil; Vandewalle, Boris; Wambacq, Piet; Chava, Bharani; Croes, Kris; Dehan, Morin; Jang, Doyoung; Leray, Philippe; Liu, Tsung-Te; Miyaguchi, Kenichi; Parvais, Bertrand; Schuddinck, Pieter; Weemaes, Philippe; Mercha, Abdelkarim; Boemmels, Juergen; Horiguchi, Naoto; McIntyre, Greg; Thean, Aaron; Tokei, Zsolt; Cheng, Shaunee; Verkest, Diederik; Steegen, An (2014) -
Device Scaling roadmap and its implications for Logic and Analog platform
Spessot, Alessio; Parvais, Bertrand; Rawat, Amita; Miyaguchi, Kenichi; Weckx, Pieter; Jang, Doyoung; Ryckaert, Julien (2020) -
Evaluation of the impact of source/drain epi implementation on logic performance using combined process and circuit simulation
Soussou, Assawer; Schram, Tom; Miyaguchi, Kenichi; Chakarov, Ivan; Parvais, Bertrand; Ervin, Joseph (2020) -
Impact of fin shape variability on device performance towards 10nm node
Tomida, Kazuyuki; Hiraga, Keizo; Dehan, Morin; Hellings, Geert; Jang, Doyoung; Miyaguchi, Kenichi; Chiarella, Thomas; Kim, Min-Soo; Mocuta, Anda; Horiguchi, Naoto; Mercha, Abdelkarim; Verkest, Diederik; Thean, Aaron (2015) -
Impact of multi-gate device architectures on digital and analog circuits and its implications on system-on-chip technologies
Thean, Aaron; Wambacq, Piet; Lee, Jae Woo; Cho, Moon Ju; Veloso, Anabela; Sasaki, Yuichiro; Chiarella, Thomas; Miyaguchi, Kenichi; Parvais, Bertrand; Garcia Bardon, Marie; Schuddinck, Pieter; Kim, Min-Soo; Horiguchi, Naoto; Dehan, Morin; Mercha, Abdelkarim; Van der Plas, Geert; Collaert, Nadine; Verkest, Diederik (2013) -
Modeling FinFET metal gate stack resistance for 14nm node and beyond
Miyaguchi, Kenichi; Parvais, Bertrand; Ragnarsson, Lars-Ake; Wambacq, Piet; Raghavan, Praveen; Mercha, Abdelkarim; Mocuta, Anda; Verkest, Diederik; Thean, Aaron (2015) -
On the ballistic ratio in 14nm-node FinFETs
Bufler, Fabian; Miyaguchi, Kenichi; Chiarella, Thomas; Horiguchi, Naoto; Mocuta, Anda (2017) -
Power aware FinFET and lateral nanosheet FET targeting for 3nm CMOS technology
Yakimets, Dmitry; Garcia Bardon, Marie; Jang, Doyoung; Schuddinck, Pieter; Sherazi, Yasser; Weckx, Pieter; Miyaguchi, Kenichi; Parvais, Bertrand; Raghavan, Praveen; Spessot, Alessio; Verkest, Diederik; Mocuta, Anda (2017) -
Scaling of BTI reliability in presence of Time-zero Variability – Pathfinding from planar FET to advanced 3-D FinFET nodes
Kukner, Halil; Weckx, Pieter; Franco, Jacopo; Toledano Luque, Maria; Cho, Moon Ju; Kaczer, Ben; Raghavan, Praveen; Jang, Doyoung; Miyaguchi, Kenichi; Garcia Bardon, Marie; Catthoor, Francky; Van der Perre, Liesbet; Lauwereins, Rudy; Groeseneken, Guido (2014) -
Self-heating on bulk FinFET from 14nm down to 7nm node
Jang, Doyoung; Bury, Erik; Ritzenthaler, Romain; Garcia Bardon, Marie; Chiarella, Thomas; Miyaguchi, Kenichi; Raghavan, Praveen; Mocuta, Anda; Groeseneken, Guido; Mercha, Abdelkarim; Verkest, Diederik; Thean, Aaron (2015) -
Simplistic simulation-based device-VT-targeting technique to determine technology high-density LELE-gate-patterned FinFET SRAM in sub-10 nm era
Sakhare, Sushil; Miyaguchi, Kenichi; Raghavan, Praveen; Mercha, Abdelkarim (2015) -
Single and double diffusion breaks in 14nm FinFET and beyond
Miyaguchi, Kenichi; Bufler, Fabian; Chiarella, Thomas; Matagne, Philippe; Horiguchi, Naoto; De Keersgieter, An; Eneman, Geert; Parvais, Bertrand; Mocuta, Anda; Spessot, Alessio; Verkest, Diederik (2017) -
STI and eSiGe source/drain stressors induced stress modeling in 28 nm technology with replacement gate (RMG) process
Jang, Doyoung; Garcia Bardon, Marie; Yakimets, Dmitry; Miyaguchi, Kenichi; De Keersgieter, An; Chiarella, Thomas; Ritzenthaler, Romain; Dehan, Morin; Mercha, Abdelkarim (2013)