Browsing by author "Mocuta, Anda"
Now showing items 21-40 of 121
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Cost effective FinFET platform for stand alone DRAM 1Y and beyond memory periphery
Spessot, Alessio; Sharan, Neha; Oh, Hyungrock; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Mallik, Arindam; De Keersgieter, An; Parvais, Bertrand; Sherazi, Yasser; Machkaoutsan, Vladimir; Kim, Cheolgyu; Fazan, Pierre; Mocuta, Dan; Mocuta, Anda; Horiguchi, Naoto (2018-01) -
Dedicated technology threshold voltage tuning for 6T SRAM beyond N7
Gupta, Mohit; Weckx, Pieter; Cosemans, Stefan; Schuddinck, Pieter; Baert, Rogier; Jang, Doyoung; Sherazi, Yasser; Raghavan, Praveen; Spessot, Alessio; Mocuta, Anda; Dehaene, Wim (2017) -
Deducing the apparent flat-band position Vafb and the doping level of large area single layer graphene MOS capacitors
Lin, Dennis; Asselberghs, Inge; Vais, Abhitosh; Arutchelvan, G.; Delabie, Annelies; Heyns, Marc; Mocuta, Anda; Radu, Iuliana; Thean, Aaron (2015) -
Defect-based compact modeling for RTN and BTI variability
Weckx, Pieter; Simicic, Marko; Nomoto, Kazuki; Ono, Makoto; Parvais, Bertrand; Kaczer, Ben; Raghavan, Praveen; Linten, Dimitri; Sawada, Ken; Ammo, Hiroaki; Yamakawa, Shinya; Spessot, Alessio; Verkest, Diederik; Mocuta, Anda (2017) -
Design-technology co-optimization for OxRRAM-based synaptic processing unit
Mallik, Arindam; Garbin, Daniele; Fantini, Andrea; Rodopoulos, Dimitrios; Degraeve, Robin; Stuijt, Jan; Das, Anup Kumar; Schaafsma, Siebren; Debacker, Peter; Donadio, Gabriele Luca; Hody, Hubert; Goux, Ludovic; Kar, Gouri Sankar; Furnemont, Arnaud; Mocuta, Anda; Raghavan, Praveen (2017) -
Device challenges for logic scaling for sub-5 nm node
Jang, Doyoung; Garcia Bardon, Marie; Yakimets, Dmitry; Schuddinck, Pieter; Ragnarsson, Lars-Ake; Sharan, Neha; Parvais, Bertrand; Spessot, Alessio; Verkest, Diederik; Mocuta, Anda (2018) -
Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7
Gupta, Mohit; Weckx, Pieter; Cosemans, Stefan; Schuddinck, Pieter; Baert, Rogier; Yakimets, Dmitry; Jang, Doyoung; Sherazi, Yasser; Raghavan, Praveen; Spessot, Alessio; Mocuta, Anda; Dehaene, Wim (2017) -
Device exploration of nanosheet transistors for sub-7nm technology node
Jang, Doyoung; Yakimets, Dmitry; Eneman, Geert; Schuddinck, Pieter; Garcia Bardon, Marie; Raghavan, Praveen; Spessot, Alessio; Verkest, Diederik; Mocuta, Anda (2017) -
Device-, circuit- & block-level evaluation of CFET in a 4 track library
Schuddinck, Pieter; Zografos, Odysseas; Weckx, Pieter; Matagne, Philippe; Sarkar, Satadru; Sherazi, Yasser; Baert, Rogier; Jang, Doyoung; Yakimets, Dmitry; Gupta, Anshul; Parvais, Bertrand; Ryckaert, Julien; Verkest, Diederik; Mocuta, Anda (2019) -
Diffusion and gate replacement: a new gate-first high-k/metal gate CMOS integration scheme suppressing gate height symmetry
Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; Caillat, Christian; Cho, Moon Ju; Simoen, Eddy; Aoulaiche, Marc; Albert, Johan; Chew, Soon Aik; Noh, Kyung Bong; Son, Yunik; Mitard, Jerome; Mocuta, Anda; Horiguchi, Naoto; Fazan, Pierre; Thean, Aaron (2016) -
DTCO flow for device exploration
Yakimets, Dmitry; Schuddinck, Pieter; Matagne, Philippe; Parvais, Bertrand; Mocuta, Anda (2018) -
Dynamic threshold voltage influence on Ge pMOSFET hysteresis
Oliveira, A. V.; Agopian, P. G. D.; Martino, A.; Arimura, Hiroaki; Mitard, Jerome; Mertens, Hans; Mocuta, Anda; Collaert, Nadine; Simoen, Eddy; Claeys, Cor; Thean, Aaron (2015) -
Economics of semiconductor scaling – a cost analysis for advanced technology node
Mallik, Arindam; Ryckaert, Julien; Kim, Ryan Ryoung han; Debacker, Peter; Decoster, Stefan; Lazzarino, Frederic; Ritzenthaler, Romain; Horiguchi, Naoto; Verkest, Diederik; Mocuta, Anda (2019) -
Effects of negative-bias-temperature-instability on low-frequency noise in SiGe p MOSFETs
Duan, Guo Xing; Hachtel, Jordan; Zhang, En Xia; Zhang, Cher Xuan; Fleetwood, Daniel; Schrimpf, Ronald; Reed, Robert; Mitard, Jerome; Linten, Dimitri; Witters, Liesbeth; Collaert, Nadine; Mocuta, Anda; Chisholm, Matthew; Pantelides, Sokrates (2016) -
Electric-field induced quantum broadening of the characteristic energy level of traps in semiconductors and oxides
Mohammed, Mazharuddin; Verhulst, Anne; Verreck, Devin; Degraeve, Robin; Kaczer, Ben; Simoen, Eddy; Soree, Bart; Van de Put, Maarten; Mocuta, Anda; Collaert, Nadine; Thean, Aaron; Groeseneken, Guido (2016) -
Electrical characteristics of P-type bulk Si fin field-effect transistor using solid-source doping with 1-nm phosphosilicate glass
Kikuchi, Yoshiaki; Chiarella, Thomas; De Roest, David; Blanquart, Timothee; De Keersgieter, An; Kenis, Karine; Peter, Antony; Ong, Patrick; Van Besien, Els; Tao, Zheng; Kim, Min-Soo; Kubicek, Stefan; Chew, Soon Aik; Schram, Tom; Demuynck, Steven; Mocuta, Anda; Mocuta, Dan; Horiguchi, Naoto (2016) -
Electrical effect of a single extended defect in MOSFETs: a simulation study
Ni, Kai; Eneman, Geert; Simoen, Eddy; Mocuta, Anda; Collaert, Nadine; Thean, Aaron; Schrimpf, Ronald; Reed, Robert; Fleetwood, Daniel (2016) -
Enablement of STT-MRAM as last level cache for the high performance computing domain at the 5nm node
Sakhare, Sushil; Perumkunnil, Manu; Huynh Bao, Trong; Rao, Siddharth; Kim, Woojin; Crotti, Davide; Yasin, Farrukh; Couet, Sebastien; Swerts, Johan; Kundu, Shreya; Yakimets, Dmitry; Baert, Rogier; Oh, Hyungrock; Spessot, Alessio; Mocuta, Anda; Kar, Gouri Sankar; Furnemont, Arnaud (2018) -
Enabling CMOS scaling towards 3nm and beyond
Mocuta, Anda; Weckx, Pieter; Demuynck, Steven; Radisic, Alex; Oniki, Yusuke; Ryckaert, Julien (2018) -
ESD diodes in next generation bulk FinFET and GAA NW technology nodes
Chen, Shih-Hung; Hellings, Geert; Linten, Dimitri; Mertens, Hans; Chiarella, Thomas; Mitard, Jerome; Mocuta, Anda; Horiguchi, Naoto (2018)