Browsing by Author "Ramesh, Siva"
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Publication A Novel Ni-Al Alloy Metal Induced Lateral Crystallization Process for Improved Channel Conduction in 3-D NAND Flash
Journal article2022, IEEE ELECTRON DEVICE LETTERS, (43) 12, p.2085-2088Publication Beyond-Si materials and devices for more Moore and more than Moore applications
Proceedings paper2016, International Conference on IC Design and Technology - ICICDT, 27/06/2016, p.1-5Publication Effective contact resistivity reduction for Mo/Pd/n-In0.53Ga0.47As contact
; ; ; ; ; Journal article2019, IEEE Electron Device Letters, (40) 11, p.1800-1803Publication Enabling 3D NAND Trench Cells for Scaled Flash Memories
; ; ; ; ; Proceedings paper2023, 15th IEEE International Memory Workshop (IMW), MAY 21-24, 2023, p.121-124Publication Erase behavior of charge trap flash memory devices using high-k dielectric as blocking oxide liner
Meeting abstract2020, 51st IEEE Semiconductor Interface Specialists Conference - SISC, 16/12/2020, p.13.4Publication First demonstration of MOVPE In1-xGaxAs macaroni channel for 3-D NAND memory devices
Meeting abstract2019, International Memory Workshop 2019, 13/05/2019, p.87-90Publication First demonstration of ruthenium and molybdenum word lines integrated into 40nm ptch 3D NAND memory devices
Proceedings paper2021, 2021 Symposium on VLSI Technology, 13/06/2021Publication Gate MOSCAP Studies on Electroless Deposited Nickel Boron as Word Line Candidate Metal for Future Scaled 3-D NAND Flash
Journal article2023, ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, (12) 4, p.Art. 045003Publication High-K incorporated in a SiON tunnel layer for 3D NAND programming voltage reduction
; ; ; ; ; Proceedings paper2022, 14th IEEE International Memory Workshop (IMW), MAR 15-18, 2022, p.144-147Publication Integration of Ruthenium-based Wordline in a 3-D NAND Memory Devices
Proceedings paper2020, 2020 IEEE International Memory Workshop (IMW), 17/05/2020, p.1-4Publication Investigation of the Impact of Ferroelectricity Boosted Gate Stacks for 3D NAND on Short Time Data Retention and Endurance
Proceedings paper2024, International Reliability Physics Symposium (IRPS), 2024-04-14Publication Junctionless gate-all-around lateral and vertical nanowire FETs with simplified processing for advanced logic and analog/RF applications and scaled SRAM cells
Proceedings paper2016, IEEE Symposium on VLSI Technology, 13/06/2016, p.138-139Publication Optimization of Retention in Ferroelectricity Boosted Gate Stacks for 3D NAND
Proceedings paper2023, 15th IEEE International Memory Workshop (IMW), MAY 21-24, 2023, p.105-108Publication Pure-Metal Replacement Gate for Reliable 30 nm Pitch Scaled 3D NAND Flash
; ; ; ; ; Maes, J. W.Proceedings paper2024, International Memory Workshop (IMW), 2024-05-12Publication Record performance top-down In0.53Ga0.47As vertical nanowire FETs and vertical nanosheets
Proceedings paper2017, IEEE International Electron Devices Meeting - IEDM, 2/12/2017, p.409-412Publication Reliability of Mo as Word Line Metal in 3D NAND
Proceedings paper2021, IEEE International Reliability Physics Symposium (IRPS), MAR 21-24, 2021Publication Top-down InGaAs nanowire and Fin vertical FETs with record performance
Proceedings paper2016, Symposium on VLSI Technology, 13/06/2016, p.164-165Publication Understanding the factors affecting contact resistance in nanowire field effect transistors (NWFETs) to improve nanoscale contacts for future scaling
Journal article2022, JOURNAL OF APPLIED PHYSICS, (132) 2, p.024302Publication Understanding the kinetics of Metal Induced Lateral Crystallization process to enhance the poly-Si channel quality and current conduction in 3-D NAND memory
Proceedings paper2021, IEEE International Electron Devices Meeting (IEDM), DEC 11-16, 2021Publication Understanding the Origin of Metal Gate Work Function Shift and Its Impact on Erase Performance in 3D NAND Flash Memories
; ; ; ; El Hajjam, Gabriel KhalilJournal article2021, MICROMACHINES, (12) 9, p.Art. 1084