Browsing by Author "Thiam, Arame"
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Publication Advanced PnR Logic Patterning Enabled by High-NA EUV Lithography
Proceedings paper2025, 2025 Conference on Optical and EUV Nanolithography, 2025-04-22, p.1342410-1Publication All-electrical control of scaled spin logic devices based on domain wall motion
Proceedings paper2020, IEEE International Electron Devices Meeting (IEDM), DEC 12-18, 2020Publication All-Electrical Control of Scaled Spin Logic Devices Based on Domain Wall Motion
Journal article2021, IEEE TRANSACTIONS ON ELECTRON DEVICES, (68) 4, p.2116-2122Publication BEOL compatible WS2 transistors fully fabricated in a 300 mm pilot line
Proceedings paper2017, Silicon Nanoelectronics Workshop - SNW, 4/07/2017, p.139-140Publication CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits
Journal article2018, Japanese Journal of Applied Physics, (57) 4S, p.04FB08Publication CMOS integration of thermally stable diffusion and gate replacement (D&GR) high-k/metal gate stacks in DRAM periphery transistors
Proceedings paper2017, 49th International Conferece on Solid State Devices and Materials - SSDM, 19/09/2017, p.533-534Publication Exploring resist options for EUV layers of IMEC N5 CMOS vehicle
Proceedings paper2019, 32nd International Microprocesses and Nanotechnology Conference - MNC, 28/10/2019Publication Fabrication and room temperature characterization of trilayer junctions for the development of 300 mm compatible superconducting qubits
Meeting abstract2020, 2020 International Conference on Solid state Devices and Materials - SSDM, 27/09/2020, p.I-4-03Publication Fabrication and room temperature characterization of trilayer junctions for the development of superconducting qubits on 300 mm wafers
Journal article2021, JAPANESE JOURNAL OF APPLIED PHYSICS, (60) SB, p.SBB104Publication Fabrication of magnetic tunnel junctions connected through a continuous free layer to enable spin logic devices
Journal article2018, Japanese Journal of Applied Physics, (57) 4S, p.04FN01Publication Fabrication of superconducting resonators in a 300 mm pilot line for quantum technologies
Meeting abstract2019, IEEE International Interconnect Technology Conference (IITC 2019) and Materials for Advanced Metallization Conference (MAM 2019), 3/06/2019, p.10.2Publication First demonstration of Two Metal Level Semi-damascene Interconnects with Fully Self-aligned Vias at 18MP
Proceedings paper2022-06-15, VLSI Technology and Circuits, 12-17 June 2022Publication High yield and process uniformity for 300 mm integrated WS2 FETs
Meeting abstract2021, Symposium on VLSI Technology, 13-19 /6/ 2021, p.1-2Publication Integration challenges of spin torque majority gatelogic
Oral presentation2016, IEDM Special MRAM PosterPublication Integration of interconnected magnetic tunnel junctions for spin torque majority gates
Proceedings paper2017, 49th International Conferece on Solid State Devices and Materials - SSDM, 19/09/2017Publication Investigation of Microwave Loss Induced by Oxide Regrowth in High-Q Niobium Resonators
Journal article2021, PHYSICAL REVIEW APPLIED, (16) 1, p.014018Publication Logic via printability enhancement using restricted via placement and exhaustive SRAF placement on a staggered grid
Proceedings paper2022-05-26, Conference on Optical and EUV Nanolithography XXXV Part of SPIE Advanced Conference, APR 24-MAY 27, 2022, p.120510IPublication Low-loss, low-temperature PVD SiN waveguides
; ; ; ; ; Proceedings paper2021, 17th IEEE International Conference on Group IV Photonics (GFP), DEC 07-10, 2021Publication Magnetic domain walls: from physics to devices
Proceedings paper2021, IEEE International Electron Devices Meeting (IEDM), DEC 11-16, 2021Publication Nanoscale domain wall devices with magnetic tunnel junction read and write
Journal article2021, NATURE ELECTRONICS, (4) 6, p.392-+